2
0

OY-0001.dts 1.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123
  1. /dts-v1/;
  2. #include "mt7620a.dtsi"
  3. #include <dt-bindings/input/input.h>
  4. / {
  5. compatible = "ralink,mt7620a-soc";
  6. model = "OY-0001";
  7. chosen {
  8. bootargs = "console=ttyS0,115200";
  9. };
  10. gpio-leds {
  11. compatible = "gpio-leds";
  12. powerled {
  13. label = "oy-0001:green:power";
  14. gpios = <&gpio0 9 1>;
  15. };
  16. wifiled {
  17. label = "oy-0001:green:wifi";
  18. gpios = <&gpio3 0 1>;
  19. };
  20. };
  21. gpio-keys-polled {
  22. compatible = "gpio-keys-polled";
  23. #address-cells = <1>;
  24. #size-cells = <0>;
  25. poll-interval = <20>;
  26. s1 {
  27. label = "reset";
  28. gpios = <&gpio0 1 1>;
  29. linux,code = <KEY_RESTART>;
  30. };
  31. };
  32. };
  33. &gpio2 {
  34. status = "okay";
  35. };
  36. &gpio3 {
  37. status = "okay";
  38. };
  39. &spi0 {
  40. status = "okay";
  41. m25p80@0 {
  42. #address-cells = <1>;
  43. #size-cells = <1>;
  44. compatible = "jedec,spi-nor";
  45. reg = <0>;
  46. spi-max-frequency = <10000000>;
  47. partition@0 {
  48. label = "u-boot";
  49. reg = <0x0 0x30000>;
  50. read-only;
  51. };
  52. partition@30000 {
  53. label = "u-boot-env";
  54. reg = <0x30000 0x10000>;
  55. read-only;
  56. };
  57. factory: partition@40000 {
  58. label = "factory";
  59. reg = <0x40000 0x10000>;
  60. read-only;
  61. };
  62. partition@50000 {
  63. label = "firmware";
  64. reg = <0x50000 0xfb0000>;
  65. };
  66. };
  67. };
  68. &pinctrl {
  69. state_default: pinctrl0 {
  70. gpio {
  71. ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd";
  72. ralink,function = "gpio";
  73. };
  74. };
  75. };
  76. &ethernet {
  77. pinctrl-names = "default";
  78. pinctrl-0 = <&ephy_pins>;
  79. mediatek,portmap = "llllw";
  80. };
  81. &gsw {
  82. mediatek,port4 = "ephy";
  83. };
  84. &wmac {
  85. ralink,mtd-eeprom = <&factory 0>;
  86. };
  87. &sdhci {
  88. status = "okay";
  89. };
  90. &ehci {
  91. status = "okay";
  92. };
  93. &ohci {
  94. status = "okay";
  95. };
  96. &pcie {
  97. status = "okay";
  98. };