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461-spi-ath79-add-fast-flash-read.patch 1.5 KB

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  1. --- a/drivers/spi/spi-ath79.c
  2. +++ b/drivers/spi/spi-ath79.c
  3. @@ -102,9 +102,6 @@ static void ath79_spi_enable(struct ath7
  4. /* save CTRL register */
  5. sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL);
  6. sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC);
  7. -
  8. - /* TODO: setup speed? */
  9. - ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43);
  10. }
  11. static void ath79_spi_disable(struct ath79_spi *sp)
  12. @@ -205,6 +202,33 @@ static u32 ath79_spi_txrx_mode0(struct s
  13. return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
  14. }
  15. +static int ath79_spi_read_flash_data(struct spi_device *spi,
  16. + struct spi_flash_read_message *msg)
  17. +{
  18. + struct ath79_spi *sp = ath79_spidev_to_sp(spi);
  19. +
  20. + if (msg->addr_width > 3)
  21. + return -EOPNOTSUPP;
  22. +
  23. + if (spi->chip_select || gpio_is_valid(spi->cs_gpio))
  24. + return -EOPNOTSUPP;
  25. +
  26. + /* disable GPIO mode */
  27. + ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
  28. +
  29. + memcpy_fromio(msg->buf, sp->base + msg->from, msg->len);
  30. +
  31. + /* enable GPIO mode */
  32. + ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
  33. +
  34. + /* restore IOC register */
  35. + ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
  36. +
  37. + msg->retlen = msg->len;
  38. +
  39. + return 0;
  40. +}
  41. +
  42. static int ath79_spi_probe(struct platform_device *pdev)
  43. {
  44. struct spi_master *master;
  45. @@ -234,6 +258,7 @@ static int ath79_spi_probe(struct platfo
  46. master->num_chipselect = pdata->num_chipselect;
  47. master->cs_gpios = pdata->cs_gpios;
  48. }
  49. + master->spi_flash_read = ath79_spi_read_flash_data;
  50. sp->bitbang.master = master;
  51. sp->bitbang.chipselect = ath79_spi_chipselect;