ar5416.h 4.5 KB

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  1. /*
  2. * Copyright (c) 2013 Qualcomm Atheros, Inc.
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted (subject to the limitations in the
  7. * disclaimer below) provided that the following conditions are met:
  8. *
  9. * * Redistributions of source code must retain the above copyright
  10. * notice, this list of conditions and the following disclaimer.
  11. *
  12. * * Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the
  15. * distribution.
  16. *
  17. * * Neither the name of Qualcomm Atheros nor the names of its
  18. * contributors may be used to endorse or promote products derived
  19. * from this software without specific prior written permission.
  20. *
  21. * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
  22. * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
  23. * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
  24. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  25. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  27. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  28. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  29. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  30. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  31. * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
  32. * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
  33. * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. */
  35. #include <ar5416desc.h>
  36. extern HAL_STATUS ar5416GetCapability(struct ath_hal *, HAL_CAPABILITY_TYPE,
  37. a_uint32_t, a_uint32_t *);
  38. extern const HAL_RATE_TABLE *ar5416GetRateTable(struct ath_hal *, a_uint32_t mode);
  39. extern HAL_BOOL ar5416IsInterruptPending(struct ath_hal *ah);
  40. extern HAL_BOOL ar5416GetPendingInterrupts(struct ath_hal *ah, HAL_INT *);
  41. extern HAL_INT ar5416GetInterrupts(struct ath_hal *ah);
  42. extern HAL_INT ar5416SetInterrupts(struct ath_hal *ah, HAL_INT ints);
  43. extern a_uint32_t ar5416Get11nExtBusy(struct ath_hal *ah);
  44. extern HAL_HT_RXCLEAR ar5416Get11nRxClear(struct ath_hal *ah);
  45. extern void ar5416Set11nRxClear(struct ath_hal *ah, HAL_HT_RXCLEAR rxclear);
  46. extern a_uint32_t ar5416GetTsf32(struct ath_hal *ah);
  47. extern u_int64_t ar5416GetTsf64(struct ath_hal *ah);
  48. extern void ar5416ResetTsf(struct ath_hal *ah);
  49. extern void ar5416Detach(struct ath_hal *ah);
  50. typedef enum Ar5416_Rates {
  51. rate6mb, rate9mb, rate12mb, rate18mb,
  52. rate24mb, rate36mb, rate48mb, rate54mb,
  53. rate1l, rate2l, rate2s, rate5_5l,
  54. rate5_5s, rate11l, rate11s, rateXr,
  55. rateHt20_0, rateHt20_1, rateHt20_2, rateHt20_3,
  56. rateHt20_4, rateHt20_5, rateHt20_6, rateHt20_7,
  57. rateHt40_0, rateHt40_1, rateHt40_2, rateHt40_3,
  58. rateHt40_4, rateHt40_5, rateHt40_6, rateHt40_7,
  59. rateDupCck, rateDupOfdm, rateExtCck, rateExtOfdm,
  60. Ar5416RateSize
  61. } AR5416_RATES;
  62. #ifdef MAGPIE_MERLIN
  63. #define AR_SREV_HOWL(ah) ((AH_PRIVATE(ah)->ah_macVersion) == AR_SREV_VERSION_HOWL)
  64. #define IS_5416_HOWL AR_SREV_HOWL
  65. #define AR5416_RATES_OFDM_OFFSET 0
  66. #define AR5416_RATES_CCK_OFFSET 8
  67. #define AR5416_RATES_HT20_OFFSET 16
  68. #define AR5416_RATES_HT40_OFFSET 24
  69. /* Delta from which to start power to pdadc table */
  70. #define AR5416_PWR_TABLE_OFFSET -5
  71. #define AR5416_LEGACY_CHAINMASK 1
  72. #define AR5416_1_CHAINMASK 1
  73. #define AR5416_2LOHI_CHAINMASK 5
  74. #define AR5416_2LOMID_CHAINMASK 3
  75. #define AR5416_3_CHAINMASK 7
  76. #define AH5416(_ah) ((struct ath_hal_5416 *)(_ah))
  77. #else // For Owl
  78. #endif // MAGPIE_MERLIN
  79. #define AR5416_LEGACY_CHAINMASK 1
  80. #define AH5416(_ah) ((struct ath_hal_5416 *)(_ah))
  81. /*
  82. * Various fifo fill before Tx start, in 64-byte units
  83. * i.e. put the frame in the air while still DMAing
  84. */
  85. #define MIN_TX_FIFO_THRESHOLD 0x1
  86. #define MAX_TX_FIFO_THRESHOLD (( 4096 / 64) - 1)
  87. #define INIT_TX_FIFO_THRESHOLD MIN_TX_FIFO_THRESHOLD
  88. struct ath_hal_5416
  89. {
  90. struct ath_hal_private ah_priv; /* base class */
  91. a_uint16_t ah_antennaSwitchSwap; /* Controls mapping of OID request */
  92. a_uint32_t ah_maskReg; /* copy of AR_IMR */
  93. a_uint32_t ah_slottime; /* user-specified slot time */
  94. a_int16_t ah_txPowerIndexOffset;
  95. a_uint32_t ah_intrTxqs;
  96. void *ah_cal_mem;
  97. a_uint16_t ah_ratesArray[Ar5416RateSize];
  98. #ifdef MAGPIE_MERLIN
  99. /* HT CWM state */
  100. HAL_HT_CWM ah_htcwm;
  101. #endif
  102. };