632-MIPS-ath79-gpio-enable-set-direction.patch 1002 B

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  1. --- a/arch/mips/ath79/common.h
  2. +++ b/arch/mips/ath79/common.h
  3. @@ -29,6 +29,7 @@ void ath79_gpio_function_enable(u32 mask
  4. void ath79_gpio_function_disable(u32 mask);
  5. void ath79_gpio_function_setup(u32 set, u32 clear);
  6. void ath79_gpio_output_select(unsigned gpio, u8 val);
  7. +int ath79_gpio_direction_select(unsigned gpio, bool oe);
  8. void ath79_gpio_init(void);
  9. #endif /* __ATH79_COMMON_H */
  10. --- a/arch/mips/ath79/gpio.c
  11. +++ b/arch/mips/ath79/gpio.c
  12. @@ -83,3 +83,19 @@ void __init ath79_gpio_output_select(uns
  13. /* flush write */
  14. (void) __raw_readl(base + reg);
  15. }
  16. +
  17. +int ath79_gpio_direction_select(unsigned gpio, bool oe)
  18. +{
  19. + void __iomem *base = ath79_gpio_base;
  20. + bool ieq_1 = (soc_is_ar934x() ||
  21. + soc_is_qca953x());
  22. +
  23. + if ((ieq_1 && oe) || (!ieq_1 && !oe))
  24. + __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << gpio),
  25. + base + AR71XX_GPIO_REG_OE);
  26. + else
  27. + __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << gpio),
  28. + base + AR71XX_GPIO_REG_OE);
  29. +
  30. + return 0;
  31. +}