1
0

0026-DT-Add-documentation-for-gpio-ralink.patch 1.8 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859
  1. From d410e5478c622c01fcf31427533df5f433df9146 Mon Sep 17 00:00:00 2001
  2. From: John Crispin <blogic@openwrt.org>
  3. Date: Sun, 28 Jul 2013 19:45:30 +0200
  4. Subject: [PATCH 26/53] DT: Add documentation for gpio-ralink
  5. Describe gpio-ralink binding.
  6. Signed-off-by: John Crispin <blogic@openwrt.org>
  7. Cc: linux-mips@linux-mips.org
  8. Cc: devicetree@vger.kernel.org
  9. Cc: linux-gpio@vger.kernel.org
  10. ---
  11. .../devicetree/bindings/gpio/gpio-ralink.txt | 40 ++++++++++++++++++++
  12. 1 file changed, 40 insertions(+)
  13. create mode 100644 Documentation/devicetree/bindings/gpio/gpio-ralink.txt
  14. --- /dev/null
  15. +++ b/Documentation/devicetree/bindings/gpio/gpio-ralink.txt
  16. @@ -0,0 +1,40 @@
  17. +Ralink SoC GPIO controller bindings
  18. +
  19. +Required properties:
  20. +- compatible:
  21. + - "ralink,rt2880-gpio" for Ralink controllers
  22. +- #gpio-cells : Should be two.
  23. + - first cell is the pin number
  24. + - second cell is used to specify optional parameters (unused)
  25. +- gpio-controller : Marks the device node as a GPIO controller
  26. +- reg : Physical base address and length of the controller's registers
  27. +- interrupt-parent: phandle to the INTC device node
  28. +- interrupts : Specify the INTC interrupt number
  29. +- ralink,num-gpios : Specify the number of GPIOs
  30. +- ralink,register-map : The register layout depends on the GPIO bank and actual
  31. + SoC type. Register offsets need to be in this order.
  32. + [ INT, EDGE, RENA, FENA, DATA, DIR, POL, SET, RESET, TOGGLE ]
  33. +
  34. +Optional properties:
  35. +- ralink,gpio-base : Specify the GPIO chips base number
  36. +
  37. +Example:
  38. +
  39. + gpio0: gpio@600 {
  40. + compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
  41. +
  42. + #gpio-cells = <2>;
  43. + gpio-controller;
  44. +
  45. + reg = <0x600 0x34>;
  46. +
  47. + interrupt-parent = <&intc>;
  48. + interrupts = <6>;
  49. +
  50. + ralink,gpio-base = <0>;
  51. + ralink,num-gpios = <24>;
  52. + ralink,register-map = [ 00 04 08 0c
  53. + 20 24 28 2c
  54. + 30 34 ];
  55. +
  56. + };