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ramips: restore the mediatek-4-byte-spi-reset.patch

patch was dropped in commit 447cf1a2b7efa3949c8562d08bddcfaba3a5d809

Signed-off-by: L. D. Pinney <ldpinney@gmail.com>
L. D. Pinney 2 years ago
parent
commit
0adcc234e6
1 changed files with 43 additions and 0 deletions
  1. 43 0
      target/linux/ramips/patches-4.4/0902-mediatek-4-byte-spi-reset.patch

+ 43 - 0
target/linux/ramips/patches-4.4/0902-mediatek-4-byte-spi-reset.patch

@@ -0,0 +1,43 @@
+diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
+index fe9ceb7..2151975 100644
+--- a/drivers/mtd/devices/m25p80.c
++++ b/drivers/mtd/devices/m25p80.c
+@@ -27,6 +27,9 @@
+ #include <linux/spi/flash.h>
+ #include <linux/mtd/spi-nor.h>
+ 
++#define OPCODE_RESET_ENABLE	0x66
++#define OPCODE_RESET		0x99
++
+ #define	MAX_CMD_SIZE		6
+ struct m25p {
+ 	struct spi_device	*spi;
+@@ -168,6 +171,17 @@ static int m25p80_erase(struct spi_nor *nor, loff_t offset)
+ 	return 0;
+ }
+ 
++void m25p80_reboot(struct mtd_info *mtd)
++{
++	struct spi_nor *nor = container_of(mtd, struct spi_nor, mtd);
++	struct m25p *flash = nor->priv;
++
++	flash->command[0] = OPCODE_RESET_ENABLE;
++	spi_write(flash->spi, flash->command, 1);
++	flash->command[0] = OPCODE_RESET;
++	spi_write(flash->spi, flash->command, 1);
++}
++
+ /*
+  * board specific setup should have ensured the SPI clock used here
+  * matches what the READ command supports, at least until this driver
+@@ -197,6 +211,7 @@ static int m25p_probe(struct spi_device *spi)
+ 	nor->erase = m25p80_erase;
+ 	nor->write_reg = m25p80_write_reg;
+ 	nor->read_reg = m25p80_read_reg;
++	nor->mtd._reboot = m25p80_reboot;
+ 
+ 	nor->dev = &spi->dev;
+ 	nor->flash_node = spi->dev.of_node;
+-- 
+2.9.3
+