543-ath9k_entropy_from_adc.patch 5.9 KB

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  1. --- a/drivers/net/wireless/ath/ath9k/hw.h
  2. +++ b/drivers/net/wireless/ath/ath9k/hw.h
  3. @@ -721,6 +721,7 @@ struct ath_spec_scan {
  4. * @config_pci_powersave:
  5. * @calibrate: periodic calibration for NF, ANI, IQ, ADC gain, ADC-DC
  6. *
  7. + * @get_adc_entropy: get entropy from the raw ADC I/Q output
  8. * @spectral_scan_config: set parameters for spectral scan and enable/disable it
  9. * @spectral_scan_trigger: trigger a spectral scan run
  10. * @spectral_scan_wait: wait for a spectral scan run to finish
  11. @@ -743,6 +744,7 @@ struct ath_hw_ops {
  12. struct ath_hw_antcomb_conf *antconf);
  13. void (*antdiv_comb_conf_set)(struct ath_hw *ah,
  14. struct ath_hw_antcomb_conf *antconf);
  15. + void (*get_adc_entropy)(struct ath_hw *ah, u8 *buf, size_t len);
  16. void (*spectral_scan_config)(struct ath_hw *ah,
  17. struct ath_spec_scan *param);
  18. void (*spectral_scan_trigger)(struct ath_hw *ah);
  19. --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
  20. +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
  21. @@ -1947,6 +1947,26 @@ void ar9003_hw_init_rate_txpower(struct
  22. }
  23. }
  24. +static void ar9003_hw_get_adc_entropy(struct ath_hw *ah, u8 *buf, size_t len)
  25. +{
  26. + int i, j;
  27. +
  28. + REG_RMW_FIELD(ah, AR_PHY_TEST, AR_PHY_TEST_BBB_OBS_SEL, 1);
  29. + REG_CLR_BIT(ah, AR_PHY_TEST, AR_PHY_TEST_RX_OBS_SEL_BIT5);
  30. + REG_RMW_FIELD(ah, AR_PHY_TEST_CTL_STATUS, AR_PHY_TEST_CTL_RX_OBS_SEL, 0);
  31. +
  32. + memset(buf, 0, len);
  33. + for (i = 0; i < len; i++) {
  34. + for (j = 0; j < 4; j++) {
  35. + u32 regval = REG_READ(ah, AR_PHY_TST_ADC);
  36. +
  37. + buf[i] <<= 2;
  38. + buf[i] |= (regval & 1) | ((regval & BIT(10)) >> 9);
  39. + udelay(1);
  40. + }
  41. + }
  42. +}
  43. +
  44. void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
  45. {
  46. struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
  47. @@ -1983,6 +2003,7 @@ void ar9003_hw_attach_phy_ops(struct ath
  48. priv_ops->set_radar_params = ar9003_hw_set_radar_params;
  49. priv_ops->fast_chan_change = ar9003_hw_fast_chan_change;
  50. + ops->get_adc_entropy = ar9003_hw_get_adc_entropy;
  51. ops->antdiv_comb_conf_get = ar9003_hw_antdiv_comb_conf_get;
  52. ops->antdiv_comb_conf_set = ar9003_hw_antdiv_comb_conf_set;
  53. ops->spectral_scan_config = ar9003_hw_spectral_scan_config;
  54. --- a/drivers/net/wireless/ath/ath9k/init.c
  55. +++ b/drivers/net/wireless/ath/ath9k/init.c
  56. @@ -765,7 +765,8 @@ static void ath9k_init_txpower_limits(st
  57. if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
  58. ath9k_init_band_txpower(sc, NL80211_BAND_5GHZ);
  59. - ah->curchan = curchan;
  60. + if (curchan)
  61. + ah->curchan = curchan;
  62. }
  63. static const struct ieee80211_iface_limit if_limits[] = {
  64. @@ -958,6 +959,18 @@ static void ath9k_set_hw_capab(struct at
  65. SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
  66. }
  67. +static void ath_get_initial_entropy(struct ath_softc *sc)
  68. +{
  69. + struct ath_hw *ah = sc->sc_ah;
  70. + char buf[256];
  71. +
  72. + /* reuse last channel initialized by the tx power test */
  73. + ath9k_hw_reset(ah, ah->curchan, NULL, false);
  74. +
  75. + ath9k_hw_get_adc_entropy(ah, buf, sizeof(buf));
  76. + add_device_randomness(buf, sizeof(buf));
  77. +}
  78. +
  79. int ath9k_init_device(u16 devid, struct ath_softc *sc,
  80. const struct ath_bus_ops *bus_ops)
  81. {
  82. @@ -1003,6 +1016,8 @@ int ath9k_init_device(u16 devid, struct
  83. ARRAY_SIZE(ath9k_tpt_blink));
  84. #endif
  85. + ath_get_initial_entropy(sc);
  86. +
  87. /* Register with mac80211 */
  88. error = ieee80211_register_hw(hw);
  89. if (error)
  90. --- a/drivers/net/wireless/ath/ath9k/hw-ops.h
  91. +++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
  92. @@ -100,6 +100,12 @@ static inline void ath9k_hw_tx99_set_txp
  93. ath9k_hw_ops(ah)->tx99_set_txpower(ah, power);
  94. }
  95. +static inline void ath9k_hw_get_adc_entropy(struct ath_hw *ah,
  96. + u8 *buf, size_t len)
  97. +{
  98. + ath9k_hw_ops(ah)->get_adc_entropy(ah, buf, len);
  99. +}
  100. +
  101. #ifdef CPTCFG_ATH9K_BTCOEX_SUPPORT
  102. static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable)
  103. --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
  104. +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
  105. @@ -1322,9 +1322,30 @@ void ar5008_hw_init_rate_txpower(struct
  106. }
  107. }
  108. +static void ar5008_hw_get_adc_entropy(struct ath_hw *ah, u8 *buf, size_t len)
  109. +{
  110. + int i, j;
  111. +
  112. + REG_RMW_FIELD(ah, AR_PHY_TEST, AR_PHY_TEST_BBB_OBS_SEL, 1);
  113. + REG_CLR_BIT(ah, AR_PHY_TEST, AR_PHY_TEST_RX_OBS_SEL_BIT5);
  114. + REG_RMW_FIELD(ah, AR_PHY_TEST2, AR_PHY_TEST2_RX_OBS_SEL, 0);
  115. +
  116. + memset(buf, 0, len);
  117. + for (i = 0; i < len; i++) {
  118. + for (j = 0; j < 4; j++) {
  119. + u32 regval = REG_READ(ah, AR_PHY_TST_ADC);
  120. +
  121. + buf[i] <<= 2;
  122. + buf[i] |= (regval & 1) | ((regval & BIT(9)) >> 8);
  123. + udelay(1);
  124. + }
  125. + }
  126. +}
  127. +
  128. int ar5008_hw_attach_phy_ops(struct ath_hw *ah)
  129. {
  130. struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
  131. + struct ath_hw_ops *ops = ath9k_hw_ops(ah);
  132. static const u32 ar5416_cca_regs[6] = {
  133. AR_PHY_CCA,
  134. AR_PHY_CH1_CCA,
  135. @@ -1339,6 +1360,8 @@ int ar5008_hw_attach_phy_ops(struct ath_
  136. if (ret)
  137. return ret;
  138. + ops->get_adc_entropy = ar5008_hw_get_adc_entropy;
  139. +
  140. priv_ops->rf_set_freq = ar5008_hw_set_channel;
  141. priv_ops->spur_mitigate_freq = ar5008_hw_spur_mitigate;
  142. --- a/drivers/net/wireless/ath/ath9k/ar9002_phy.h
  143. +++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.h
  144. @@ -20,6 +20,12 @@
  145. #define PHY_AGC_CLR 0x10000000
  146. #define RFSILENT_BB 0x00002000
  147. +#define AR_PHY_TEST_BBB_OBS_SEL 0x780000
  148. +#define AR_PHY_TEST_BBB_OBS_SEL_S 19
  149. +
  150. +#define AR_PHY_TEST_RX_OBS_SEL_BIT5_S 23
  151. +#define AR_PHY_TEST_RX_OBS_SEL_BIT5 (1 << AR_PHY_TEST_RX_OBS_SEL_BIT5_S)
  152. +
  153. #define AR_PHY_TURBO 0x9804
  154. #define AR_PHY_FC_TURBO_MODE 0x00000001
  155. #define AR_PHY_FC_TURBO_SHORT 0x00000002
  156. @@ -36,6 +42,9 @@
  157. #define AR_PHY_TEST2 0x9808
  158. +#define AR_PHY_TEST2_RX_OBS_SEL 0x3C00
  159. +#define AR_PHY_TEST2_RX_OBS_SEL_S 10
  160. +
  161. #define AR_PHY_TIMING2 0x9810
  162. #define AR_PHY_TIMING3 0x9814
  163. #define AR_PHY_TIMING3_DSC_MAN 0xFFFE0000
  164. @@ -393,6 +402,8 @@
  165. #define AR_PHY_RFBUS_GRANT 0x9C20
  166. #define AR_PHY_RFBUS_GRANT_EN 0x00000001
  167. +#define AR_PHY_TST_ADC 0x9C24
  168. +
  169. #define AR_PHY_CHAN_INFO_GAIN_DIFF 0x9CF4
  170. #define AR_PHY_CHAN_INFO_GAIN_DIFF_UPPER_LIMIT 320