 Joanna Farley
|
1064bc6c8c
Merge changes from topic "idling-during-subsystem-restart" into integration
|
10 meses atrás |
 Akshay Belsare
|
663f024f20
feat(versal): extend platform address space sizes
|
10 meses atrás |
 Jay Buddhabhatti
|
ade92a64e4
feat(xilinx): add handler for power down req sgi irq
|
1 ano atrás |
|
Jay Buddhabhatti
|
79953190bc
fix(xilinx): rename macros to align with ARM
|
1 ano atrás |
 Prasad Kummari
|
bfe82cff6f
fix(versal): type cast addresses to fix integer overflow
|
1 ano atrás |
 Amit Nagal
|
56afab73a8
fix(versal): use correct macro name for ocm base address
|
1 ano atrás |
|
Amit Nagal
|
56d1857efc
feat(versal): ddr address reservation in dtb at runtime
|
1 ano atrás |
 Ilias Apalodimas
|
f123b91fdd
fix(versal): fix BLXX memory limits for user defined values
|
1 ano atrás |
 Michal Simek
|
619bc13eda
style(xilinx): replace ARM by Arm in copyrights
|
1 ano atrás |
|
Jay Buddhabhatti
|
3ae28aa44e
refactor(versal): move set wake src fn to common place
|
1 ano atrás |
|
Jay Buddhabhatti
|
31b684898f
refactor(xilinx): rename gic macros to make common
|
1 ano atrás |
 Venkatesh Yadav Abbarapu
|
b86e1aade1
feat(versal): resolve the misra 10.1 warnings
|
2 anos atrás |
 Abhyuday Godhasara
|
0623dcea0f
fix(plat/xilinx/versal): resolve misra R7.2
|
3 anos atrás |
 Shubhrajyoti Datta
|
8b48bfb897
plat: xilinx: Error management support
|
3 anos atrás |
 Deepika Bhavnani
|
6cdef9ba11
xilinx: Unify Platform specific defines for PSCI module
|
5 anos atrás |
|
Venkatesh Yadav Abbarapu
|
31ce893ec2
xilinx: versal: PLM to ATF handover
|
4 anos atrás |
|
Venkatesh Yadav Abbarapu
|
29af478975
versal: Increase OCM memory size for DEBUG builds
|
5 anos atrás |
 Tejas Patel
|
5a8ffeabf9
xilinx: versal: Add PSCI APIs for suspend/resume
|
5 anos atrás |
|
Tejas Patel
|
ab36d09709
plat: xilinx: versal: Move versal_def.h to include directory
|
6 anos atrás |
 Antonio Nino Diaz
|
09d40e0e08
Sanitise includes across codebase
|
6 anos atrás |
 Siva Durga Prasad Paladugu
|
f91c3cb1df
arm64: versal: Add support for new Xilinx Versal ACAPs
|
6 anos atrás |
