Ryan Everett
|
3fb52e41fd
refactor(cpus): remove cpu specific errata funcs
|
hai 8 meses |
Sona Mathew
|
9a0c81257f
fix(cpus): revert erroneous use of override_vector_table macro in Cortex-A73
|
hai 1 ano |
Sona Mathew
|
51e9eb101e
refactor(cpus): convert the Cortex-A73 to use the cpu helpers
|
hai 1 ano |
Sona Mathew
|
7711223d00
refactor(cpus): convert Cortex-A73 to use the errata framework
|
hai 1 ano |
Sona Mathew
|
e2da5e0ed7
refactor(cpus): reorder Cortex-A73 errata by ascending order
|
hai 1 ano |
Bipin Ravi
|
9b2510b69d
fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57
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%!s(int64=2) %!d(string=hai) anos |
Louis Mayencourt
|
25278eaba7
Cortex-A73: Implement workaround for errata 852427
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%!s(int64=5) %!d(string=hai) anos |
Louis Mayencourt
|
e6cab15dc7
Add workaround for errata 855423 of Cortex-A73
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%!s(int64=5) %!d(string=hai) anos |
Antonio Nino Diaz
|
09d40e0e08
Sanitise includes across codebase
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%!s(int64=6) %!d(string=hai) anos |
Dimitris Papastamos
|
bd5a76ac7c
cpulib: Add ISBs or comment why they are unneeded
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%!s(int64=6) %!d(string=hai) anos |
Dimitris Papastamos
|
fe007b2e15
Add support for dynamic mitigation for CVE-2018-3639
|
%!s(int64=6) %!d(string=hai) anos |
Dimitris Papastamos
|
b8a25bbb0b
Implement static workaround for CVE-2018-3639
|
%!s(int64=6) %!d(string=hai) anos |
Dimitris Papastamos
|
2c3a10780d
Rename symbols and files relating to CVE-2017-5715
|
%!s(int64=6) %!d(string=hai) anos |
Dimitris Papastamos
|
a205a56ea8
Fixup `SMCCC_ARCH_FEATURES` semantics
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%!s(int64=6) %!d(string=hai) anos |
Dimitris Papastamos
|
3991a6a49f
Use PFR0 to identify need for mitigation of CVE-2017-5715
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%!s(int64=6) %!d(string=hai) anos |
Dimitris Papastamos
|
eec9e7d1e6
Print erratum application report for CVE-2017-5715
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%!s(int64=7) %!d(string=hai) anos |
Dimitris Papastamos
|
a1781a211a
Workaround for CVE-2017-5715 on Cortex A73 and A75
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%!s(int64=7) %!d(string=hai) anos |
dp-arm
|
82cb2c1ad9
Use SPDX license identifiers
|
%!s(int64=7) %!d(string=hai) anos |
Jeenu Viswambharan
|
5dd9dbb5bf
Add provision to extend CPU operations at more levels
|
%!s(int64=8) %!d(string=hai) anos |
Naga Sureshkumar Relli
|
84629f2f2c
bl31: Add error reporting registers
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%!s(int64=8) %!d(string=hai) anos |
Yatharth Kochar
|
2460ac18ef
Add support for ARM Cortex-A73 MPCore Processor
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%!s(int64=9) %!d(string=hai) anos |