.. |
drivers
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35aa1c1e51
Tegra210: SE: switch SE clock source to CLK_M
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il y a 4 ans |
plat_psci_handlers.c
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96d07af402
feat(tegra): implement 'pwr_domain_off_early' handler
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il y a 1 an |
plat_secondary.c
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09d40e0e08
Sanitise includes across codebase
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il y a 6 ans |
plat_setup.c
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3ff448f9a7
Tegra: add platform specific 'runtime_setup' handler
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il y a 4 ans |
plat_sip_calls.c
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cb6c8efc4f
fix(tegra210): mark bits [23:17] as zero for Fast SMCs
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il y a 1 an |
platform_t210.mk
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7581dc8958
Tegra: platform specific GIC sources
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il y a 4 ans |