tc-fpga.dtsi 1.1 KB

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  1. /*
  2. * Copyright (c) 2023-2024, Arm Limited. All rights reserved.
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. */
  6. #define GIC_CTRL_ADDR 30000000
  7. #define GIC_GICR_OFFSET 0x1000000
  8. #define UART_OFFSET 0x10000
  9. /* 1440x3200@120 framebuffer */
  10. #define LCD_TIMING_CLK 836000000
  11. #define LCD_TIMING \
  12. clock-frequency = <LCD_TIMING_CLK>; \
  13. hactive = <1440>; \
  14. vactive = <3200>; \
  15. hfront-porch = <136>; \
  16. hback-porch = <296>; \
  17. hsync-len = <160>; \
  18. vfront-porch = <3>; \
  19. vback-porch = <217>; \
  20. vsync-len = <10>
  21. / {
  22. chosen {
  23. stdout-path = "serial0:38400n8";
  24. };
  25. #if TC_FPGA_ANDROID_IMG_IN_RAM
  26. reserved-memory {
  27. phram@0x880000000 {
  28. /*
  29. * starting from 0x8_8000_0000 reserve some memory
  30. * android image will be side loaded to this location
  31. */
  32. reg = <0x8 0x80000000 HI(ANDROID_FS_SIZE) LO(ANDROID_FS_SIZE)>
  33. no-map;
  34. };
  35. };
  36. #endif /* TC_FPGA_ANDROID_IMG_IN_RAM */
  37. ethernet: ethernet@ETHERNET_ADDR {
  38. compatible = "smsc,lan9115";
  39. phy-mode = "mii";
  40. };
  41. mmci: mmci@MMC_ADDR {
  42. non-removable;
  43. };
  44. };