ehci.c 30 KB

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  1. /*++
  2. Copyright (c) 2013 Minoca Corp. All Rights Reserved
  3. Module Name:
  4. ehci.c
  5. Abstract:
  6. This module implements support for the EHCI USB 2.0 Host controller.
  7. Author:
  8. Evan Green 18-Mar-2013
  9. Environment:
  10. Kernel
  11. --*/
  12. //
  13. // ------------------------------------------------------------------- Includes
  14. //
  15. #include <minoca/kernel/driver.h>
  16. #include <minoca/fw/acpitabs.h>
  17. #include <minoca/intrface/pci.h>
  18. #include <minoca/usb/usbhost.h>
  19. #include "ehci.h"
  20. //
  21. // --------------------------------------------------------------------- Macros
  22. //
  23. //
  24. // ---------------------------------------------------------------- Definitions
  25. //
  26. //
  27. // Define the wait time in seconds for the legacy bit to flip.
  28. //
  29. #define EHCI_LEGACY_SWITCH_TIMEOUT 5
  30. //
  31. // ------------------------------------------------------ Data Type Definitions
  32. //
  33. /*++
  34. Structure Description:
  35. This structure stores context about a EHCI Host Controller.
  36. Members:
  37. InterruptLine - Stores the interrupt line that this controller's interrupt
  38. comes in on.
  39. InterruptVector - Stores the interrupt vector that this controller's
  40. interrupt comes in on.
  41. InterruptResourcesFound - Stores a boolean indicating whether or not the
  42. interrupt line and interrupt vector fields are valid.
  43. InterruptHandle - Stores a pointer to the handle received when the
  44. interrupt was connected.
  45. Controller - Stores a pointer to the EHCI controller.
  46. PciConfigInterface - Stores the interface to access PCI configuration space.
  47. PciConfigInterfaceAvailable - Stores a boolean indicating if the PCI
  48. config interface is actively available.
  49. RegisteredForPciConfigInterfaces - Stores a boolean indicating whether or
  50. not the driver has regsistered for PCI Configuration Space interface
  51. access.
  52. RegisterBasePhysical - Stores the physical memory address where the EHCI
  53. registers are located.
  54. RegisterBase - Stores a pointer to the virtual address where the EHCI
  55. registers are located.
  56. OperationalOffset - Stores the offset from the register base where the
  57. operational registers begin.
  58. PortCount - Stores the number of ports in this controller.
  59. ExtendedCapabilitiesOffset - Stores the offset in PCI configuration space
  60. where the extended capabilities begin. This value must be greater than
  61. 0x40 to be valid (or else it would clash with the PCI spec).
  62. --*/
  63. typedef struct _EHCI_CONTROLLER_CONTEXT {
  64. ULONGLONG InterruptLine;
  65. ULONGLONG InterruptVector;
  66. BOOL InterruptResourcesFound;
  67. HANDLE InterruptHandle;
  68. PEHCI_CONTROLLER Controller;
  69. INTERFACE_PCI_CONFIG_ACCESS PciConfigInterface;
  70. BOOL PciConfigInterfaceAvailable;
  71. BOOL RegisteredForPciConfigInterfaces;
  72. PHYSICAL_ADDRESS RegisterBasePhysical;
  73. PVOID RegisterBase;
  74. ULONG OperationalOffset;
  75. ULONG PortCount;
  76. UCHAR ExtendedCapabilitiesOffset;
  77. } EHCI_CONTROLLER_CONTEXT, *PEHCI_CONTROLLER_CONTEXT;
  78. //
  79. // ----------------------------------------------- Internal Function Prototypes
  80. //
  81. KSTATUS
  82. EhciAddDevice (
  83. PVOID Driver,
  84. PSTR DeviceId,
  85. PSTR ClassId,
  86. PSTR CompatibleIds,
  87. PVOID DeviceToken
  88. );
  89. VOID
  90. EhciDispatchStateChange (
  91. PIRP Irp,
  92. PVOID DeviceContext,
  93. PVOID IrpContext
  94. );
  95. VOID
  96. EhciDispatchOpen (
  97. PIRP Irp,
  98. PVOID DeviceContext,
  99. PVOID IrpContext
  100. );
  101. VOID
  102. EhciDispatchClose (
  103. PIRP Irp,
  104. PVOID DeviceContext,
  105. PVOID IrpContext
  106. );
  107. VOID
  108. EhciDispatchIo (
  109. PIRP Irp,
  110. PVOID DeviceContext,
  111. PVOID IrpContext
  112. );
  113. VOID
  114. EhciDispatchSystemControl (
  115. PIRP Irp,
  116. PVOID DeviceContext,
  117. PVOID IrpContext
  118. );
  119. KSTATUS
  120. EhcipProcessResourceRequirements (
  121. PIRP Irp,
  122. PEHCI_CONTROLLER_CONTEXT Device
  123. );
  124. KSTATUS
  125. EhcipStartDevice (
  126. PIRP Irp,
  127. PEHCI_CONTROLLER_CONTEXT Device
  128. );
  129. VOID
  130. EhcipEnumerateChildren (
  131. PIRP Irp,
  132. PEHCI_CONTROLLER_CONTEXT Device
  133. );
  134. VOID
  135. EhcipProcessPciConfigInterfaceChangeNotification (
  136. PVOID Context,
  137. PDEVICE Device,
  138. PVOID InterfaceBuffer,
  139. ULONG InterfaceBufferSize,
  140. BOOL Arrival
  141. );
  142. KSTATUS
  143. EhcipDisableLegacyInterrupts (
  144. PEHCI_CONTROLLER_CONTEXT ControllerContext
  145. );
  146. KSTATUS
  147. EhcipGatherControllerParameters (
  148. PEHCI_CONTROLLER_CONTEXT ControllerContext,
  149. PRESOURCE_ALLOCATION ControllerBase
  150. );
  151. //
  152. // -------------------------------------------------------------------- Globals
  153. //
  154. //
  155. // Set this flag to avoid bringing up the EHCI driver if there's debug data.
  156. // This is helpful when debugging other drivers that come up at the same time
  157. // as EHCI.
  158. //
  159. BOOL EhciLeaveDebuggerAlone = FALSE;
  160. PDRIVER EhciDriver = NULL;
  161. UUID EhciPciConfigurationInterfaceUuid = UUID_PCI_CONFIG_ACCESS;
  162. //
  163. // ------------------------------------------------------------------ Functions
  164. //
  165. KSTATUS
  166. DriverEntry (
  167. PDRIVER Driver
  168. )
  169. /*++
  170. Routine Description:
  171. This routine is the entry point for the EHCI driver. It registers its other
  172. dispatch functions, and performs driver-wide initialization.
  173. Arguments:
  174. Driver - Supplies a pointer to the driver object.
  175. Return Value:
  176. STATUS_SUCCESS on success.
  177. Failure code on error.
  178. --*/
  179. {
  180. DRIVER_FUNCTION_TABLE FunctionTable;
  181. KSTATUS Status;
  182. EhciDriver = Driver;
  183. RtlZeroMemory(&FunctionTable, sizeof(DRIVER_FUNCTION_TABLE));
  184. FunctionTable.Version = DRIVER_FUNCTION_TABLE_VERSION;
  185. FunctionTable.AddDevice = EhciAddDevice;
  186. FunctionTable.DispatchStateChange = EhciDispatchStateChange;
  187. FunctionTable.DispatchOpen = EhciDispatchOpen;
  188. FunctionTable.DispatchClose = EhciDispatchClose;
  189. FunctionTable.DispatchIo = EhciDispatchIo;
  190. FunctionTable.DispatchSystemControl = EhciDispatchSystemControl;
  191. Status = IoRegisterDriverFunctions(Driver, &FunctionTable);
  192. return Status;
  193. }
  194. //
  195. // --------------------------------------------------------- Internal Functions
  196. //
  197. KSTATUS
  198. EhciAddDevice (
  199. PVOID Driver,
  200. PSTR DeviceId,
  201. PSTR ClassId,
  202. PSTR CompatibleIds,
  203. PVOID DeviceToken
  204. )
  205. /*++
  206. Routine Description:
  207. This routine is called when a device is detected for which the EHCI driver
  208. acts as the function driver. The driver will attach itself to the stack.
  209. Arguments:
  210. Driver - Supplies a pointer to the driver being called.
  211. DeviceId - Supplies a pointer to a string with the device ID.
  212. ClassId - Supplies a pointer to a string containing the device's class ID.
  213. CompatibleIds - Supplies a pointer to a string containing device IDs
  214. that would be compatible with this device.
  215. DeviceToken - Supplies an opaque token that the driver can use to identify
  216. the device in the system. This token should be used when attaching to
  217. the stack.
  218. Return Value:
  219. STATUS_SUCCESS on success.
  220. Failure code if the driver was unsuccessful in attaching itself.
  221. --*/
  222. {
  223. PEHCI_CONTROLLER_CONTEXT NewDevice;
  224. KSTATUS Status;
  225. //
  226. // Create the device context and attach to the device.
  227. //
  228. NewDevice = MmAllocateNonPagedPool(sizeof(EHCI_CONTROLLER_CONTEXT),
  229. EHCI_ALLOCATION_TAG);
  230. if (NewDevice == NULL) {
  231. return STATUS_INSUFFICIENT_RESOURCES;
  232. }
  233. RtlZeroMemory(NewDevice, sizeof(EHCI_CONTROLLER_CONTEXT));
  234. NewDevice->InterruptHandle = INVALID_HANDLE;
  235. Status = IoAttachDriverToDevice(Driver, DeviceToken, NewDevice);
  236. return Status;
  237. }
  238. VOID
  239. EhciDispatchStateChange (
  240. PIRP Irp,
  241. PVOID DeviceContext,
  242. PVOID IrpContext
  243. )
  244. /*++
  245. Routine Description:
  246. This routine handles State Change IRPs.
  247. Arguments:
  248. Irp - Supplies a pointer to the I/O request packet.
  249. DeviceContext - Supplies the context pointer supplied by the driver when it
  250. attached itself to the driver stack. Presumably this pointer contains
  251. driver-specific device context.
  252. IrpContext - Supplies the context pointer supplied by the driver when
  253. the IRP was created.
  254. Return Value:
  255. None.
  256. --*/
  257. {
  258. PEHCI_CONTROLLER_CONTEXT Device;
  259. KSTATUS Status;
  260. ASSERT(Irp->MajorCode == IrpMajorStateChange);
  261. Device = (PEHCI_CONTROLLER_CONTEXT)DeviceContext;
  262. //
  263. // If there is no controller context, then EHCI is acting as the bus driver
  264. // for the root hub. Simply complete standard IRPs.
  265. //
  266. if (Device == NULL) {
  267. switch (Irp->MinorCode) {
  268. case IrpMinorQueryResources:
  269. case IrpMinorStartDevice:
  270. case IrpMinorQueryChildren:
  271. IoCompleteIrp(EhciDriver, Irp, STATUS_SUCCESS);
  272. break;
  273. default:
  274. break;
  275. }
  276. return;
  277. }
  278. if ((Irp->Direction == IrpUp) && (!KSUCCESS(IoGetIrpStatus(Irp)))) {
  279. return;
  280. }
  281. switch (Irp->MinorCode) {
  282. case IrpMinorQueryResources:
  283. //
  284. // On the way up, filter the resource requirements to add interrupt
  285. // vectors to any lines.
  286. //
  287. if (Irp->Direction == IrpUp) {
  288. Status = EhcipProcessResourceRequirements(Irp, Device);
  289. if (!KSUCCESS(Status)) {
  290. IoCompleteIrp(EhciDriver, Irp, Status);
  291. }
  292. }
  293. break;
  294. case IrpMinorStartDevice:
  295. //
  296. // Attempt to fire the thing up if the bus has already started it.
  297. //
  298. if (Irp->Direction == IrpUp) {
  299. Status = EhcipStartDevice(Irp, Device);
  300. if (!KSUCCESS(Status)) {
  301. IoCompleteIrp(EhciDriver, Irp, Status);
  302. }
  303. }
  304. break;
  305. case IrpMinorQueryChildren:
  306. if (Irp->Direction == IrpUp) {
  307. EhcipEnumerateChildren(Irp, Device);
  308. }
  309. break;
  310. case IrpMinorRemoveDevice:
  311. ASSERT(FALSE);
  312. break;
  313. //
  314. // For all other IRPs, do nothing.
  315. //
  316. default:
  317. break;
  318. }
  319. return;
  320. }
  321. VOID
  322. EhciDispatchOpen (
  323. PIRP Irp,
  324. PVOID DeviceContext,
  325. PVOID IrpContext
  326. )
  327. /*++
  328. Routine Description:
  329. This routine handles Open IRPs.
  330. Arguments:
  331. Irp - Supplies a pointer to the I/O request packet.
  332. DeviceContext - Supplies the context pointer supplied by the driver when it
  333. attached itself to the driver stack. Presumably this pointer contains
  334. driver-specific device context.
  335. IrpContext - Supplies the context pointer supplied by the driver when
  336. the IRP was created.
  337. Return Value:
  338. None.
  339. --*/
  340. {
  341. return;
  342. }
  343. VOID
  344. EhciDispatchClose (
  345. PIRP Irp,
  346. PVOID DeviceContext,
  347. PVOID IrpContext
  348. )
  349. /*++
  350. Routine Description:
  351. This routine handles Close IRPs.
  352. Arguments:
  353. Irp - Supplies a pointer to the I/O request packet.
  354. DeviceContext - Supplies the context pointer supplied by the driver when it
  355. attached itself to the driver stack. Presumably this pointer contains
  356. driver-specific device context.
  357. IrpContext - Supplies the context pointer supplied by the driver when
  358. the IRP was created.
  359. Return Value:
  360. None.
  361. --*/
  362. {
  363. return;
  364. }
  365. VOID
  366. EhciDispatchIo (
  367. PIRP Irp,
  368. PVOID DeviceContext,
  369. PVOID IrpContext
  370. )
  371. /*++
  372. Routine Description:
  373. This routine handles I/O IRPs.
  374. Arguments:
  375. Irp - Supplies a pointer to the I/O request packet.
  376. DeviceContext - Supplies the context pointer supplied by the driver when it
  377. attached itself to the driver stack. Presumably this pointer contains
  378. driver-specific device context.
  379. IrpContext - Supplies the context pointer supplied by the driver when
  380. the IRP was created.
  381. Return Value:
  382. None.
  383. --*/
  384. {
  385. return;
  386. }
  387. VOID
  388. EhciDispatchSystemControl (
  389. PIRP Irp,
  390. PVOID DeviceContext,
  391. PVOID IrpContext
  392. )
  393. /*++
  394. Routine Description:
  395. This routine handles System Control IRPs.
  396. Arguments:
  397. Irp - Supplies a pointer to the I/O request packet.
  398. DeviceContext - Supplies the context pointer supplied by the driver when it
  399. attached itself to the driver stack. Presumably this pointer contains
  400. driver-specific device context.
  401. IrpContext - Supplies the context pointer supplied by the driver when
  402. the IRP was created.
  403. Return Value:
  404. None.
  405. --*/
  406. {
  407. ASSERT(Irp->MajorCode == IrpMajorSystemControl);
  408. //
  409. // Do no processing on any IRPs. Let them flow.
  410. //
  411. return;
  412. }
  413. KSTATUS
  414. EhcipProcessResourceRequirements (
  415. PIRP Irp,
  416. PEHCI_CONTROLLER_CONTEXT Device
  417. )
  418. /*++
  419. Routine Description:
  420. This routine filters through the resource requirements presented by the
  421. bus for a EHCI Host controller. It adds an interrupt vector requirement for
  422. any interrupt line requested.
  423. Arguments:
  424. Irp - Supplies a pointer to the I/O request packet.
  425. Device - Supplies a pointer to this EHCI device.
  426. Return Value:
  427. Status code.
  428. --*/
  429. {
  430. PRESOURCE_CONFIGURATION_LIST Requirements;
  431. KSTATUS Status;
  432. RESOURCE_REQUIREMENT VectorRequirement;
  433. ASSERT((Irp->MajorCode == IrpMajorStateChange) &&
  434. (Irp->MinorCode == IrpMinorQueryResources));
  435. //
  436. // Initialize a nice interrupt vector requirement in preparation.
  437. //
  438. RtlZeroMemory(&VectorRequirement, sizeof(RESOURCE_REQUIREMENT));
  439. VectorRequirement.Type = ResourceTypeInterruptVector;
  440. VectorRequirement.Minimum = 0;
  441. VectorRequirement.Maximum = -1;
  442. VectorRequirement.Length = 1;
  443. //
  444. // Loop through all configuration lists, creating a vector for each line.
  445. //
  446. Requirements = Irp->U.QueryResources.ResourceRequirements;
  447. Status = IoCreateAndAddInterruptVectorsForLines(Requirements,
  448. &VectorRequirement);
  449. if (!KSUCCESS(Status)) {
  450. goto ProcessResourceRequirementsEnd;
  451. }
  452. ProcessResourceRequirementsEnd:
  453. return Status;
  454. }
  455. KSTATUS
  456. EhcipStartDevice (
  457. PIRP Irp,
  458. PEHCI_CONTROLLER_CONTEXT Device
  459. )
  460. /*++
  461. Routine Description:
  462. This routine starts up the EHCI controller.
  463. Arguments:
  464. Irp - Supplies a pointer to the I/O request packet.
  465. Device - Supplies a pointer to this EHCI device.
  466. Return Value:
  467. Status code.
  468. --*/
  469. {
  470. PRESOURCE_ALLOCATION Allocation;
  471. PRESOURCE_ALLOCATION_LIST AllocationList;
  472. IO_CONNECT_INTERRUPT_PARAMETERS Connect;
  473. PEHCI_CONTROLLER Controller;
  474. PRESOURCE_ALLOCATION ControllerBase;
  475. PDEBUG_HANDOFF_DATA HandoffData;
  476. PRESOURCE_ALLOCATION LineAllocation;
  477. KSTATUS Status;
  478. PDEBUG_USB_HANDOFF_DATA UsbHandoffData;
  479. Controller = NULL;
  480. ControllerBase = NULL;
  481. //
  482. // Start listening for a PCI config interface.
  483. //
  484. if (Device->RegisteredForPciConfigInterfaces == FALSE) {
  485. Status = IoRegisterForInterfaceNotifications(
  486. &EhciPciConfigurationInterfaceUuid,
  487. EhcipProcessPciConfigInterfaceChangeNotification,
  488. Irp->Device,
  489. Device,
  490. TRUE);
  491. if (!KSUCCESS(Status)) {
  492. goto StartDeviceEnd;
  493. }
  494. Device->RegisteredForPciConfigInterfaces = TRUE;
  495. }
  496. //
  497. // Loop through the allocated resources to get the controller base and the
  498. // interrupt.
  499. //
  500. AllocationList = Irp->U.StartDevice.ProcessorLocalResources;
  501. Allocation = IoGetNextResourceAllocation(AllocationList, NULL);
  502. while (Allocation != NULL) {
  503. //
  504. // If the resource is an interrupt vector, then it should have an
  505. // owning interrupt line allocation.
  506. //
  507. if (Allocation->Type == ResourceTypeInterruptVector) {
  508. //
  509. // Currently only one interrupt resource is expected.
  510. //
  511. ASSERT(Device->InterruptResourcesFound == FALSE);
  512. ASSERT(Allocation->OwningAllocation != NULL);
  513. //
  514. // Save the line and vector number.
  515. //
  516. LineAllocation = Allocation->OwningAllocation;
  517. Device->InterruptLine = LineAllocation->Allocation;
  518. Device->InterruptVector = Allocation->Allocation;
  519. Device->InterruptResourcesFound = TRUE;
  520. } else if (Allocation->Type == ResourceTypePhysicalAddressSpace) {
  521. ASSERT(ControllerBase == NULL);
  522. ControllerBase = Allocation;
  523. }
  524. //
  525. // Get the next allocation in the list.
  526. //
  527. Allocation = IoGetNextResourceAllocation(AllocationList, Allocation);
  528. }
  529. //
  530. // Fail to start if the controller base was not found.
  531. //
  532. if (ControllerBase == NULL) {
  533. Status = STATUS_INVALID_CONFIGURATION;
  534. goto StartDeviceEnd;
  535. }
  536. //
  537. // Get EHCI register parameters, including the register base and port count.
  538. //
  539. Status = EhcipGatherControllerParameters(Device, ControllerBase);
  540. if (!KSUCCESS(Status)) {
  541. goto StartDeviceEnd;
  542. }
  543. //
  544. // If there is a PCI configuation interface, shut off the legacy interrupt
  545. // redirection to SMI land.
  546. //
  547. Status = EhcipDisableLegacyInterrupts(Device);
  548. if (!KSUCCESS(Status)) {
  549. goto StartDeviceEnd;
  550. }
  551. //
  552. // Also fail if the allocation provided by the OS doesn't line up with
  553. // what's in the registers.
  554. //
  555. if (ControllerBase->Allocation != Device->RegisterBasePhysical) {
  556. ASSERT(FALSE);
  557. Status = STATUS_INVALID_CONFIGURATION;
  558. goto StartDeviceEnd;
  559. }
  560. //
  561. // Look for handoff data to see if the debugger is using this controller.
  562. //
  563. HandoffData = NULL;
  564. Status = KdGetDeviceInformation(&HandoffData);
  565. if (KSUCCESS(Status)) {
  566. if ((HandoffData == NULL) ||
  567. (HandoffData->PortType != DEBUG_PORT_TYPE_USB) ||
  568. (HandoffData->PortSubType != DEBUG_PORT_USB_EHCI) ||
  569. (HandoffData->Identifier != Device->RegisterBasePhysical)) {
  570. HandoffData = NULL;
  571. }
  572. } else {
  573. HandoffData = NULL;
  574. }
  575. if ((HandoffData != NULL) && (EhciLeaveDebuggerAlone != FALSE)) {
  576. RtlDebugPrint("EHCI: Not starting due to debug device.\n");
  577. Status = STATUS_RESOURCE_IN_USE;
  578. goto StartDeviceEnd;
  579. }
  580. //
  581. // Allocate the controller structures.
  582. //
  583. UsbHandoffData = NULL;
  584. if (HandoffData != NULL) {
  585. UsbHandoffData = &(HandoffData->U.Usb);
  586. }
  587. Controller = EhcipInitializeControllerState(
  588. Device->RegisterBase + Device->OperationalOffset,
  589. Device->RegisterBasePhysical,
  590. Device->PortCount,
  591. UsbHandoffData);
  592. if (Controller == NULL) {
  593. Status = STATUS_INSUFFICIENT_RESOURCES;
  594. goto StartDeviceEnd;
  595. }
  596. Device->Controller = Controller;
  597. //
  598. // Start up the controller.
  599. //
  600. Status = EhcipResetController(Controller);
  601. if (!KSUCCESS(Status)) {
  602. goto StartDeviceEnd;
  603. }
  604. //
  605. // Register the device with the USB core. This is required before enabling
  606. // the interrupt.
  607. //
  608. Status = EhcipRegisterController(Controller, Irp->Device);
  609. if (!KSUCCESS(Status)) {
  610. goto StartDeviceEnd;
  611. }
  612. //
  613. // Attempt to connect the interrupt.
  614. //
  615. ASSERT(Device->InterruptHandle == INVALID_HANDLE);
  616. RtlZeroMemory(&Connect, sizeof(IO_CONNECT_INTERRUPT_PARAMETERS));
  617. Connect.Version = IO_CONNECT_INTERRUPT_PARAMETERS_VERSION;
  618. Connect.Device = Irp->Device;
  619. Connect.LineNumber = Device->InterruptLine;
  620. Connect.Vector = Device->InterruptVector;
  621. Connect.InterruptServiceRoutine = EhcipInterruptService;
  622. Connect.DispatchServiceRoutine = EhcipInterruptServiceDpc;
  623. Connect.Context = Device->Controller;
  624. Connect.Interrupt = &(Device->InterruptHandle);
  625. Status = IoConnectInterrupt(&Connect);
  626. if (!KSUCCESS(Status)) {
  627. goto StartDeviceEnd;
  628. }
  629. EhcipSetInterruptHandle(Controller, Device->InterruptHandle);
  630. StartDeviceEnd:
  631. if (!KSUCCESS(Status)) {
  632. if (Device->InterruptHandle != INVALID_HANDLE) {
  633. IoDisconnectInterrupt(Device->InterruptHandle);
  634. Device->InterruptHandle = INVALID_HANDLE;
  635. }
  636. if (Controller != NULL) {
  637. EhcipDestroyControllerState(Controller);
  638. }
  639. }
  640. return Status;
  641. }
  642. VOID
  643. EhcipEnumerateChildren (
  644. PIRP Irp,
  645. PEHCI_CONTROLLER_CONTEXT Device
  646. )
  647. /*++
  648. Routine Description:
  649. This routine enumerates the root hub of a EHCI controller.
  650. Arguments:
  651. Irp - Supplies a pointer to the I/O request packet.
  652. Device - Supplies a pointer to this EHCI device.
  653. Return Value:
  654. None.
  655. --*/
  656. {
  657. KSTATUS Status;
  658. //
  659. // Forward this on to the USB core to figure out.
  660. //
  661. Status = UsbHostQueryChildren(Irp, Device->Controller->UsbCoreHandle);
  662. IoCompleteIrp(EhciDriver, Irp, Status);
  663. return;
  664. }
  665. VOID
  666. EhcipProcessPciConfigInterfaceChangeNotification (
  667. PVOID Context,
  668. PDEVICE Device,
  669. PVOID InterfaceBuffer,
  670. ULONG InterfaceBufferSize,
  671. BOOL Arrival
  672. )
  673. /*++
  674. Routine Description:
  675. This routine is called when a PCI configuration space access interface
  676. changes in availability.
  677. Arguments:
  678. Context - Supplies the caller's context pointer, supplied when the caller
  679. requested interface notifications.
  680. Device - Supplies a pointer to the device exposing or deleting the
  681. interface.
  682. InterfaceBuffer - Supplies a pointer to the interface buffer of the
  683. interface.
  684. InterfaceBufferSize - Supplies the buffer size.
  685. Arrival - Supplies TRUE if a new interface is arriving, or FALSE if an
  686. interface is departing.
  687. Return Value:
  688. None.
  689. --*/
  690. {
  691. PEHCI_CONTROLLER_CONTEXT ControllerContext;
  692. ControllerContext = (PEHCI_CONTROLLER_CONTEXT)Context;
  693. if (Arrival != FALSE) {
  694. if (InterfaceBufferSize >= sizeof(INTERFACE_PCI_CONFIG_ACCESS)) {
  695. ASSERT(ControllerContext->PciConfigInterfaceAvailable == FALSE);
  696. RtlCopyMemory(&(ControllerContext->PciConfigInterface),
  697. InterfaceBuffer,
  698. sizeof(INTERFACE_PCI_CONFIG_ACCESS));
  699. ControllerContext->PciConfigInterfaceAvailable = TRUE;
  700. }
  701. } else {
  702. ControllerContext->PciConfigInterfaceAvailable = FALSE;
  703. }
  704. return;
  705. }
  706. KSTATUS
  707. EhcipDisableLegacyInterrupts (
  708. PEHCI_CONTROLLER_CONTEXT ControllerContext
  709. )
  710. /*++
  711. Routine Description:
  712. This routine disables routing of EHCI interrupts to SMI land (which is used
  713. to emulate a PS/2 keyboard when a USB keyboard is connected).
  714. Without running this, the BIOS would continue to think it owned the EHCI
  715. controller, causing both register clashes and the OS not to get interrupts.
  716. Arguments:
  717. ControllerContext - Supplies a pointer to the EHCI controller context.
  718. Return Value:
  719. Status code.
  720. --*/
  721. {
  722. ULONGLONG LegacyControl;
  723. ULONG LegacyControlRegister;
  724. PVOID PciDeviceToken;
  725. PREAD_PCI_CONFIG ReadPciConfig;
  726. KSTATUS Status;
  727. BOOL TimedOut;
  728. ULONGLONG Timeout;
  729. PWRITE_PCI_CONFIG WritePciConfig;
  730. //
  731. // If no PCI config interface is available, then this must not be a legacy
  732. // platform.
  733. //
  734. if ((ControllerContext->PciConfigInterfaceAvailable == FALSE) ||
  735. (ControllerContext->ExtendedCapabilitiesOffset == 0)) {
  736. Status = STATUS_SUCCESS;
  737. goto DisableLegacyInterruptsEnd;
  738. }
  739. ReadPciConfig = ControllerContext->PciConfigInterface.ReadPciConfig;
  740. WritePciConfig = ControllerContext->PciConfigInterface.WritePciConfig;
  741. PciDeviceToken = ControllerContext->PciConfigInterface.DeviceToken;
  742. //
  743. // Check to see if the EHCI controller is owned by the OS. If it is still
  744. // owned by the BIOS, claim ownership, and wait for the BIOS to agree.
  745. //
  746. LegacyControlRegister = ControllerContext->ExtendedCapabilitiesOffset +
  747. EHCI_EECP_LEGACY_SUPPORT_REGISTER;
  748. Status = ReadPciConfig(PciDeviceToken,
  749. LegacyControlRegister,
  750. sizeof(ULONG),
  751. &LegacyControl);
  752. if (!KSUCCESS(Status)) {
  753. goto DisableLegacyInterruptsEnd;
  754. }
  755. if ((LegacyControl & EHCI_LEGACY_SUPPORT_BIOS_OWNED) != 0) {
  756. //
  757. // If both the OS and BIOS owned bits are set, this is an indication
  758. // something more serious is wrong, or these are not really EHCI
  759. // registers.
  760. //
  761. ASSERT((LegacyControl & EHCI_LEGACY_SUPPORT_OS_OWNED) == 0);
  762. //
  763. // Write the "OS owned" bit to request that the BIOS stop trying to be
  764. // helpful and get out of the way.
  765. //
  766. LegacyControl |= EHCI_LEGACY_SUPPORT_OS_OWNED;
  767. Status = WritePciConfig(PciDeviceToken,
  768. LegacyControlRegister,
  769. sizeof(ULONG),
  770. LegacyControl);
  771. //
  772. // Now loop waiting for the BIOS to give it up.
  773. //
  774. Timeout = KeGetRecentTimeCounter() +
  775. (HlQueryTimeCounterFrequency() * EHCI_LEGACY_SWITCH_TIMEOUT);
  776. TimedOut = TRUE;
  777. do {
  778. Status = ReadPciConfig(PciDeviceToken,
  779. LegacyControlRegister,
  780. sizeof(ULONG),
  781. &LegacyControl);
  782. if (!KSUCCESS(Status)) {
  783. goto DisableLegacyInterruptsEnd;
  784. }
  785. if ((LegacyControl & EHCI_LEGACY_SUPPORT_BIOS_OWNED) == 0) {
  786. Status = STATUS_SUCCESS;
  787. TimedOut = FALSE;
  788. break;
  789. }
  790. } while (KeGetRecentTimeCounter() <= Timeout);
  791. if (TimedOut != FALSE) {
  792. RtlDebugPrint("EHCI: BIOS failed to relinquish control: 0x%I64x\n",
  793. LegacyControl);
  794. Status = STATUS_TIMEOUT;
  795. }
  796. if (!KSUCCESS(Status)) {
  797. goto DisableLegacyInterruptsEnd;
  798. }
  799. }
  800. Status = STATUS_SUCCESS;
  801. DisableLegacyInterruptsEnd:
  802. return Status;
  803. }
  804. KSTATUS
  805. EhcipGatherControllerParameters (
  806. PEHCI_CONTROLLER_CONTEXT ControllerContext,
  807. PRESOURCE_ALLOCATION ControllerBase
  808. )
  809. /*++
  810. Routine Description:
  811. This routine pokes around and collects various pieces of needed information
  812. for the controller, such as the register base, operational offset, and
  813. port count.
  814. Arguments:
  815. ControllerContext - Supplies a pointer to the EHCI controller context.
  816. ControllerBase - Supplies a pointer to the resource allocation defining the
  817. location of the controller's registers.
  818. Return Value:
  819. Status code.
  820. --*/
  821. {
  822. ULONG AlignmentOffset;
  823. ULONG Capabilities;
  824. PVOID CapabilitiesRegister;
  825. PHYSICAL_ADDRESS EndAddress;
  826. PVOID LengthRegister;
  827. ULONG PageSize;
  828. ULONG Parameters;
  829. PVOID ParametersRegister;
  830. PVOID PciDeviceToken;
  831. PHYSICAL_ADDRESS PhysicalAddress;
  832. PREAD_PCI_CONFIG ReadPciConfig;
  833. ULONG Size;
  834. KSTATUS Status;
  835. ULONGLONG Value;
  836. PVOID VirtualAddress;
  837. //
  838. // If a PCI config interface is available, verify the base address.
  839. //
  840. if (ControllerContext->PciConfigInterfaceAvailable != FALSE) {
  841. //
  842. // Read the register base register to find out where all the other
  843. // registers begin in memory.
  844. //
  845. ReadPciConfig = ControllerContext->PciConfigInterface.ReadPciConfig;
  846. PciDeviceToken = ControllerContext->PciConfigInterface.DeviceToken;
  847. if (ControllerContext->RegisterBasePhysical == 0) {
  848. Status = ReadPciConfig(PciDeviceToken,
  849. EHCI_USB_REGISTER_BASE_REGISTER,
  850. sizeof(ULONG),
  851. &Value);
  852. if (!KSUCCESS(Status)) {
  853. goto GatherControllerParametersEnd;
  854. }
  855. PhysicalAddress = (ULONG)Value &
  856. EHCI_USB_REGISTER_BASE_ADDRESS_MASK;
  857. ASSERT(PhysicalAddress == ControllerBase->Allocation);
  858. ControllerContext->RegisterBasePhysical = PhysicalAddress;
  859. }
  860. } else {
  861. ControllerContext->RegisterBasePhysical = ControllerBase->Allocation;
  862. }
  863. //
  864. // Map those registers if needed.
  865. //
  866. ASSERT(ControllerContext->RegisterBasePhysical != 0);
  867. if (ControllerContext->RegisterBase == NULL) {
  868. //
  869. // Page align the mapping request.
  870. //
  871. PageSize = MmPageSize();
  872. ASSERT(ControllerContext->RegisterBasePhysical ==
  873. ControllerBase->Allocation);
  874. PhysicalAddress = ControllerContext->RegisterBasePhysical;
  875. EndAddress = PhysicalAddress + ControllerBase->Length;
  876. PhysicalAddress = ALIGN_RANGE_DOWN(PhysicalAddress, PageSize);
  877. AlignmentOffset = ControllerContext->RegisterBasePhysical -
  878. PhysicalAddress;
  879. EndAddress = ALIGN_RANGE_UP(EndAddress, PageSize);
  880. Size = (ULONG)(EndAddress - PhysicalAddress);
  881. VirtualAddress = MmMapPhysicalAddress(PhysicalAddress,
  882. Size,
  883. TRUE,
  884. FALSE,
  885. TRUE);
  886. if (VirtualAddress == NULL) {
  887. Status = STATUS_NO_MEMORY;
  888. goto GatherControllerParametersEnd;
  889. }
  890. ControllerContext->RegisterBase = VirtualAddress + AlignmentOffset;
  891. }
  892. ASSERT(ControllerContext->RegisterBase != NULL);
  893. //
  894. // Read the operational offset if needed.
  895. //
  896. if (ControllerContext->OperationalOffset == 0) {
  897. LengthRegister = ControllerContext->RegisterBase +
  898. EHCI_CAPABILITY_LENGTH_REGISTER;
  899. ControllerContext->OperationalOffset = HlReadRegister8(LengthRegister);
  900. }
  901. //
  902. // Read the port count and other structural parameters if needed.
  903. //
  904. if (ControllerContext->PortCount == 0) {
  905. ParametersRegister = ControllerContext->RegisterBase +
  906. EHCI_CAPABILITY_PARAMETERS_REGISTER;
  907. Parameters = HlReadRegister32(ParametersRegister);
  908. ControllerContext->PortCount =
  909. Parameters & EHCI_CAPABILITY_PARAMETERS_PORT_COUNT_MASK;
  910. }
  911. if (ControllerContext->PortCount == 0) {
  912. ASSERT(FALSE);
  913. Status = STATUS_NO_SUCH_DEVICE;
  914. goto GatherControllerParametersEnd;
  915. }
  916. //
  917. // Grab the extended capabilities offset.
  918. //
  919. if (ControllerContext->ExtendedCapabilitiesOffset == 0) {
  920. CapabilitiesRegister = ControllerContext->RegisterBase +
  921. EHCI_CAPABILITY_CAPABILITIES_REGISTER;
  922. Capabilities = HlReadRegister32(CapabilitiesRegister);
  923. ControllerContext->ExtendedCapabilitiesOffset =
  924. (Capabilities &
  925. EHCI_CAPABILITY_CAPABILITIES_EXTENDED_CAPABILITIES_MASK) >>
  926. EHCI_CAPABILITY_CAPABILITIES_EXTENDED_CAPABILITIES_SHIFT;
  927. }
  928. Status = STATUS_SUCCESS;
  929. GatherControllerParametersEnd:
  930. return Status;
  931. }