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sdstd.h 26 KB

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  1. /*++
  2. Copyright (c) 2014 Minoca Corp. All rights reserved.
  3. Module Name:
  4. sdstd.h
  5. Abstract:
  6. This header contains hardware definitions for a standard SD/MMC device.
  7. Author:
  8. Evan Green 27-Feb-2014
  9. --*/
  10. //
  11. // ------------------------------------------------------------------- Includes
  12. //
  13. //
  14. // ---------------------------------------------------------------- Definitions
  15. //
  16. //
  17. // Define SD card voltages.
  18. //
  19. #define SD_VOLTAGE_165_195 0x00000080
  20. #define SD_VOLTAGE_20_21 0x00000100
  21. #define SD_VOLTAGE_21_22 0x00000200
  22. #define SD_VOLTAGE_22_23 0x00000400
  23. #define SD_VOLTAGE_23_24 0x00000800
  24. #define SD_VOLTAGE_24_25 0x00001000
  25. #define SD_VOLTAGE_25_26 0x00002000
  26. #define SD_VOLTAGE_26_27 0x00004000
  27. #define SD_VOLTAGE_27_28 0x00008000
  28. #define SD_VOLTAGE_28_29 0x00010000
  29. #define SD_VOLTAGE_29_30 0x00020000
  30. #define SD_VOLTAGE_30_31 0x00040000
  31. #define SD_VOLTAGE_31_32 0x00080000
  32. #define SD_VOLTAGE_32_33 0x00100000
  33. #define SD_VOLTAGE_33_34 0x00200000
  34. #define SD_VOLTAGE_34_35 0x00400000
  35. #define SD_VOLTAGE_35_36 0x00800000
  36. #define SD_VOLTAGE_18 0x01000000
  37. //
  38. // SD block size/count registeer definitions.
  39. //
  40. #define SD_SIZE_SDMA_BOUNDARY_4K (0x0 << 12)
  41. #define SD_SIZE_SDMA_BOUNDARY_8K (0x1 << 12)
  42. #define SD_SIZE_SDMA_BOUNDARY_16K (0x2 << 12)
  43. #define SD_SIZE_SDMA_BOUNDARY_32K (0x3 << 12)
  44. #define SD_SIZE_SDMA_BOUNDARY_64K (0x4 << 12)
  45. #define SD_SIZE_SDMA_BOUNDARY_128K (0x5 << 12)
  46. #define SD_SIZE_SDMA_BOUNDARY_256K (0x6 << 12)
  47. #define SD_SIZE_SDMA_BOUNDARY_512K (0x7 << 12)
  48. //
  49. // SD Command register definitions.
  50. //
  51. #define SD_COMMAND_DMA_ENABLE (1 << 0)
  52. #define SD_COMMAND_BLOCK_COUNT_ENABLE (1 << 1)
  53. #define SD_COMMAND_AUTO_COMMAND_DISABLE (0 << 2)
  54. #define SD_COMMAND_AUTO_COMMAND12_ENABLE (1 << 2)
  55. #define SD_COMMAND_AUTO_COMMAND23_ENABLE (2 << 2)
  56. #define SD_COMMAND_TRANSFER_READ (1 << 4)
  57. #define SD_COMMAND_TRANSFER_WRITE (0 << 4)
  58. #define SD_COMMAND_SINGLE_BLOCK (0 << 5)
  59. #define SD_COMMAND_MULTIPLE_BLOCKS (1 << 5)
  60. #define SD_COMMAND_RESPONSE_NONE (0 << 16)
  61. #define SD_COMMAND_RESPONSE_136 (1 << 16)
  62. #define SD_COMMAND_RESPONSE_48 (2 << 16)
  63. #define SD_COMMAND_RESPONSE_48_BUSY (3 << 16)
  64. #define SD_COMMAND_CRC_CHECK_ENABLE (1 << 19)
  65. #define SD_COMMAND_COMMAND_INDEX_CHECK_ENABLE (1 << 20)
  66. #define SD_COMMAND_DATA_PRESENT (1 << 21)
  67. #define SD_COMMAND_TYPE_NORMAL (0 << 22)
  68. #define SD_COMMAND_TYPE_SUSPEND (1 << 22)
  69. #define SD_COMMAND_TYPE_RESUME (2 << 22)
  70. #define SD_COMMAND_TYPE_ABORT (3 << 22)
  71. #define SD_COMMAND_INDEX_SHIFT 24
  72. //
  73. // SD Present State register definitions.
  74. //
  75. #define SD_STATE_COMMAND_INHIBIT (1 << 0)
  76. #define SD_STATE_DATA_INHIBIT (1 << 1)
  77. #define SD_STATE_DATA_LINE_ACTIVE (1 << 2)
  78. #define SD_STATE_RETUNING_REQUEST (1 << 3)
  79. #define SD_STATE_WRITE_TRANSFER_ACTIVE (1 << 8)
  80. #define SD_STATE_READ_TRANSFER_ACTIVE (1 << 9)
  81. #define SD_STATE_BUFFER_WRITE_ENABLE (1 << 10)
  82. #define SD_STATE_BUFFER_READ_ENABLE (1 << 11)
  83. #define SD_STATE_CARD_INSERTED (1 << 16)
  84. #define SD_STATE_CARD_STATE_STABLE (1 << 17)
  85. #define SD_STATE_CARD_DETECT_PIN_LEVEL (1 << 18)
  86. #define SD_STATE_WRITE_PROTECT_PIN_LEVEL (1 << 19)
  87. #define SD_STATE_DATA_LINE_LEVEL_MASK (0xF << 20)
  88. #define SD_STATE_COMMAND_LINE_LEVEL (1 << 24)
  89. //
  90. // SD Host control register definitions.
  91. //
  92. #define SD_HOST_CONTROL_LED_ON (1 << 0)
  93. #define SD_HOST_CONTROL_DATA_1BIT (0 << 1)
  94. #define SD_HOST_CONTROL_DATA_4BIT (1 << 1)
  95. #define SD_HOST_CONTROL_HIGH_SPEED (1 << 2)
  96. #define SD_HOST_CONTROL_SDMA (0 << 3)
  97. #define SD_HOST_CONTROL_32BIT_ADMA2 (2 << 3)
  98. #define SD_HOST_CONTROL_DMA_MODE_MASK (3 << 3)
  99. #define SD_HOST_CONTROL_DATA_8BIT (1 << 5)
  100. #define SD_HOST_CONTROL_CARD_DETECT_TEST (1 << 6)
  101. #define SD_HOST_CONTROL_USE_CARD_DETECT_TEST (1 << 7)
  102. #define SD_HOST_CONTROL_POWER_ENABLE (1 << 8)
  103. #define SD_HOST_CONTROL_POWER_MASK (7 << 9)
  104. #define SD_HOST_CONTROL_POWER_1V8 (5 << 9)
  105. #define SD_HOST_CONTROL_POWER_3V0 (6 << 9)
  106. #define SD_HOST_CONTROL_POWER_3V3 (7 << 9)
  107. #define SD_HOST_CONTROL_STOP_AT_BLOCK_GAP (1 << 16)
  108. #define SD_HOST_CONTROL_CONTINUE (1 << 17)
  109. #define SD_HOST_CONTROL_READ_WAIT_CONTROL (1 << 18)
  110. #define SD_HOST_CONTROL_INTERRUPT_AT_BLOCK_GAP (1 << 19)
  111. #define SD_HOST_CONTROL_WAKE_CARD_INTERRUPT (1 << 24)
  112. #define SD_HOST_CONTROL_WAKE_CARD_INSERTION (1 << 25)
  113. #define SD_HOST_CONTROL_WAKE_CARD_REMOVAL (1 << 26)
  114. #define SD_HOST_CONTROL_BUS_WIDTH_MASK \
  115. (SD_HOST_CONTROL_DATA_4BIT | SD_HOST_CONTROL_DATA_8BIT)
  116. //
  117. // SD Clock control register definitions.
  118. //
  119. #define SD_CLOCK_CONTROL_INTERNAL_CLOCK_ENABLE (1 << 0)
  120. #define SD_CLOCK_CONTROL_CLOCK_STABLE (1 << 1)
  121. #define SD_CLOCK_CONTROL_SD_CLOCK_ENABLE (1 << 2)
  122. #define SD_CLOCK_CONTROL_PROGRAMMABLE_CLOCK_MODE (1 << 5)
  123. #define SD_CLOCK_CONTROL_DIVISOR_MASK 0xFF
  124. #define SD_CLOCK_CONTROL_DIVISOR_SHIFT 8
  125. #define SD_CLOCK_CONTROL_DIVISOR_HIGH_MASK (0x3 << 8)
  126. #define SD_CLOCK_CONTROL_DIVISOR_HIGH_SHIFT (8 - 6)
  127. #define SD_CLOCK_CONTROL_TIMEOUT_MASK (0xF << 16)
  128. #define SD_CLOCK_CONTROL_TIMEOUT_SHIFT 16
  129. #define SD_CLOCK_CONTROL_RESET_ALL (1 << 24)
  130. #define SD_CLOCK_CONTROL_RESET_COMMAND_LINE (1 << 25)
  131. #define SD_CLOCK_CONTROL_RESET_DATA_LINE (1 << 26)
  132. #define SD_CLOCK_CONTROL_DEFAULT_TIMEOUT 14
  133. //
  134. // Define the maximum divisor for the controller. These are based on the values
  135. // that can be stored in the clock control register.
  136. //
  137. #define SD_V2_MAX_DIVISOR 256
  138. #define SD_V3_MAX_DIVISOR 2046
  139. //
  140. // SD interrupt status flags.
  141. //
  142. #define SD_INTERRUPT_STATUS_COMMAND_COMPLETE (1 << 0)
  143. #define SD_INTERRUPT_STATUS_TRANSFER_COMPLETE (1 << 1)
  144. #define SD_INTERRUPT_STATUS_BLOCK_GAP_EVENT (1 << 2)
  145. #define SD_INTERRUPT_STATUS_DMA_INTERRUPT (1 << 3)
  146. #define SD_INTERRUPT_STATUS_BUFFER_WRITE_READY (1 << 4)
  147. #define SD_INTERRUPT_STATUS_BUFFER_READ_READY (1 << 5)
  148. #define SD_INTERRUPT_STATUS_CARD_INSERTION (1 << 6)
  149. #define SD_INTERRUPT_STATUS_CARD_REMOVAL (1 << 7)
  150. #define SD_INTERRUPT_STATUS_CARD_INTERRUPT (1 << 8)
  151. #define SD_INTERRUPT_STATUS_INTERRUPT_A (1 << 9)
  152. #define SD_INTERRUPT_STATUS_INTERRUPT_B (1 << 10)
  153. #define SD_INTERRUPT_STATUS_INTERRUPT_C (1 << 11)
  154. #define SD_INTERRUPT_STATUS_RETUNING_EVENT (1 << 12)
  155. #define SD_INTERRUPT_STATUS_ERROR_INTERRUPT (1 << 15)
  156. #define SD_INTERRUPT_STATUS_COMMAND_TIMEOUT_ERROR (1 << 16)
  157. #define SD_INTERRUPT_STATUS_COMMAND_CRC_ERROR (1 << 17)
  158. #define SD_INTERRUPT_STATUS_COMMAND_END_BIT_ERROR (1 << 18)
  159. #define SD_INTERRUPT_STATUS_COMMAND_INDEX_ERROR (1 << 19)
  160. #define SD_INTERRUPT_STATUS_DATA_TIMEOUT_ERROR (1 << 20)
  161. #define SD_INTERRUPT_STATUS_DATA_CRC_ERROR (1 << 21)
  162. #define SD_INTERRUPT_STATUS_DATA_END_BIT_ERROR (1 << 22)
  163. #define SD_INTERRUPT_STATUS_CURRENT_LIMIT_ERROR (1 << 23)
  164. #define SD_INTERRUPT_STATUS_AUTO_COMMAND12_ERROR (1 << 24)
  165. #define SD_INTERRUPT_STATUS_ADMA_ERROR (1 << 25)
  166. #define SD_INTERRUPT_STATUS_TUNING_ERROR (1 << 26)
  167. #define SD_INTERRUPT_STATUS_VENDOR_MASK (0xF << 28)
  168. #define SD_INTERRUPT_STATUS_ALL_MASK 0xFFFFFFFF
  169. //
  170. // SD interrupt signal and status enable flags.
  171. //
  172. #define SD_INTERRUPT_ENABLE_COMMAND_COMPLETE (1 << 0)
  173. #define SD_INTERRUPT_ENABLE_TRANSFER_COMPLETE (1 << 1)
  174. #define SD_INTERRUPT_ENABLE_BLOCK_GAP_EVENT (1 << 2)
  175. #define SD_INTERRUPT_ENABLE_DMA (1 << 3)
  176. #define SD_INTERRUPT_ENABLE_BUFFER_WRITE_READY (1 << 4)
  177. #define SD_INTERRUPT_ENABLE_BUFFER_READ_READY (1 << 5)
  178. #define SD_INTERRUPT_ENABLE_CARD_INSERTION (1 << 6)
  179. #define SD_INTERRUPT_ENABLE_CARD_REMOVAL (1 << 7)
  180. #define SD_INTERRUPT_ENABLE_CARD_INTERRUPT (1 << 8)
  181. #define SD_INTERRUPT_ENABLE_INTERRUPT_A (1 << 9)
  182. #define SD_INTERRUPT_ENABLE_INTERRUPT_B (1 << 10)
  183. #define SD_INTERRUPT_ENABLE_INTERRUPT_C (1 << 11)
  184. #define SD_INTERRUPT_ENABLE_RETUNING_EVENT (1 << 12)
  185. #define SD_INTERRUPT_ENABLE_ERROR_INTERRUPT (1 << 15)
  186. #define SD_INTERRUPT_ENABLE_ERROR_COMMAND_TIMEOUT (1 << 16)
  187. #define SD_INTERRUPT_ENABLE_ERROR_COMMAND_CRC (1 << 17)
  188. #define SD_INTERRUPT_ENABLE_ERROR_COMMAND_END_BIT (1 << 18)
  189. #define SD_INTERRUPT_ENABLE_ERROR_COMMAND_INDEX (1 << 19)
  190. #define SD_INTERRUPT_ENABLE_ERROR_DATA_TIMEOUT (1 << 20)
  191. #define SD_INTERRUPT_ENABLE_ERROR_DATA_CRC (1 << 21)
  192. #define SD_INTERRUPT_ENABLE_ERROR_DATA_END_BIT (1 << 22)
  193. #define SD_INTERRUPT_ENABLE_ERROR_CURRENT_LIMIT (1 << 23)
  194. #define SD_INTERRUPT_ENABLE_ERROR_AUTO_COMMAND12 (1 << 24)
  195. #define SD_INTERRUPT_ENABLE_ERROR_ADMA (1 << 25)
  196. #define SD_INTERRUPT_ENABLE_ERROR_TUNING (1 << 26)
  197. #define SD_INTERRUPT_STATUS_VENDOR_MASK (0xF << 28)
  198. #define SD_INTERRUPT_ENABLE_ERROR_MASK \
  199. (SD_INTERRUPT_ENABLE_ERROR_COMMAND_TIMEOUT | \
  200. SD_INTERRUPT_ENABLE_ERROR_COMMAND_CRC | \
  201. SD_INTERRUPT_ENABLE_ERROR_COMMAND_END_BIT | \
  202. SD_INTERRUPT_ENABLE_ERROR_COMMAND_INDEX | \
  203. SD_INTERRUPT_ENABLE_ERROR_DATA_TIMEOUT | \
  204. SD_INTERRUPT_ENABLE_ERROR_DATA_CRC | \
  205. SD_INTERRUPT_ENABLE_ERROR_DATA_END_BIT | \
  206. SD_INTERRUPT_ENABLE_ERROR_CURRENT_LIMIT | \
  207. SD_INTERRUPT_ENABLE_ERROR_AUTO_COMMAND12 | \
  208. SD_INTERRUPT_ENABLE_ERROR_ADMA | \
  209. SD_INTERRUPT_STATUS_VENDOR_MASK)
  210. #define SD_INTERRUPT_STATUS_ENABLE_DEFAULT_MASK \
  211. (SD_INTERRUPT_ENABLE_ERROR_MASK | \
  212. SD_INTERRUPT_ENABLE_CARD_INSERTION | \
  213. SD_INTERRUPT_ENABLE_CARD_REMOVAL | \
  214. SD_INTERRUPT_ENABLE_BUFFER_WRITE_READY | \
  215. SD_INTERRUPT_ENABLE_BUFFER_READ_READY | \
  216. SD_INTERRUPT_ENABLE_DMA | \
  217. SD_INTERRUPT_ENABLE_TRANSFER_COMPLETE | \
  218. SD_INTERRUPT_ENABLE_COMMAND_COMPLETE)
  219. #define SD_INTERRUPT_ENABLE_DEFAULT_MASK \
  220. (SD_INTERRUPT_ENABLE_CARD_INSERTION | SD_INTERRUPT_ENABLE_CARD_REMOVAL)
  221. //
  222. // SD Capabilities.
  223. //
  224. #define SD_CAPABILITY_TIMEOUT_CLOCK_MASK (0x1F << 0)
  225. #define SD_CAPABILITY_TIMEOUT_CLOCK_UNIT_MHZ (1 << 7)
  226. #define SD_CAPABILITY_V3_BASE_CLOCK_FREQUENCY_MASK 0xFF
  227. #define SD_CAPABILITY_BASE_CLOCK_FREQUENCY_MASK 0x3F
  228. #define SD_CAPABILITY_BASE_CLOCK_FREQUENCY_SHIFT 8
  229. #define SD_CAPABILITY_MAX_BLOCK_LENGTH_MASK (0x3 << 16)
  230. #define SD_CAPABILITY_MAX_BLOCK_LENGTH_512 (0x0 << 16)
  231. #define SD_CAPABILITY_MAX_BLOCK_LENGTH_1024 (0x1 << 16)
  232. #define SD_CAPABILITY_MAX_BLOCK_LENGTH_2048 (0x2 << 16)
  233. #define SD_CAPABILITY_8_BIT_WIDTH (1 << 18)
  234. #define SD_CAPABILITY_ADMA2 (1 << 19)
  235. #define SD_CAPABILITY_HIGH_SPEED (1 << 21)
  236. #define SD_CAPABILITY_SDMA (1 << 22)
  237. #define SD_CAPABILITY_SUSPEND_RESUME (1 << 23)
  238. #define SD_CAPABILITY_VOLTAGE_3V3 (1 << 24)
  239. #define SD_CAPABILITY_VOLTAGE_3V0 (1 << 25)
  240. #define SD_CAPABILITY_VOLTAGE_1V8 (1 << 26)
  241. #define SD_CAPABILITY_64_BIT (1 << 28)
  242. #define SD_CAPABILITY_ASYNCHRONOUS_INTERRUPT (1 << 29)
  243. #define SD_CAPABILITY_SLOT_TYPE_MASK (0x3 << 30)
  244. #define SD_CAPABILITY_SLOT_TYPE_REMOVABLE (0x0 << 30)
  245. #define SD_CAPABILITY_SLOT_TYPE_EMBEDDED_SINGLE_SLOT (0x1 << 30)
  246. #define SD_CAPABILITY_SLOT_TYPE_SHARED_BUS (0x2 << 30)
  247. #define SD_CAPABILITY2_SDR50 (1 << 0)
  248. #define SD_CAPABILITY2_SDR104 (1 << 1)
  249. #define SD_CAPABILITY2_DDR50 (1 << 2)
  250. #define SD_CAPABILITY2_DRIVER_TYPE_A (1 << 4)
  251. #define SD_CAPABILITY2_DRIVER_TYPE_C (1 << 5)
  252. #define SD_CAPABILITY2_DRIVER_TYPE_D (1 << 6)
  253. #define SD_CAPABILITY2_RETUNING_COUNT_MASK (0xF << 8)
  254. #define SD_CAPABILITY2_USE_TUNING_SDR50 (1 << 13)
  255. #define SD_CAPABILITY2_RETUNING_MODE_MASK (0x3 << 14)
  256. #define SD_CAPABILITY2_CLOCK_MULTIPLIER_SHIFT 16
  257. //
  258. // Auto CMD Error Status Register and Host Control 2 Register bits.
  259. //
  260. #define SD_CONTROL_STATUS2_AUTO_CMD12_NOT_EXECUTED (1 << 0)
  261. #define SD_CONTROL_STATUS2_AUTO_CMD_TIMEOUT (1 << 1)
  262. #define SD_CONTROL_STATUS2_AUTO_CMD_CRC_ERROR (1 << 2)
  263. #define SD_CONTROL_STATUS2_AUTO_CMD_END_BIT_ERROR (1 << 3)
  264. #define SD_CONTROL_STATUS2_AUTO_CMD_INDEX_ERROR (1 << 4)
  265. #define SD_CONTROL_STATUS2_AUTO_CMD_NOT_ISSUED (1 << 7)
  266. #define SD_CONTROL_STATUS2_MODE_SDR12 (0x0 << 16)
  267. #define SD_CONTROL_STATUS2_MODE_SDR25 (0x1 << 16)
  268. #define SD_CONTROL_STATUS2_MODE_SDR50 (0x2 << 16)
  269. #define SD_CONTROL_STATUS2_MODE_SDR104 (0x3 << 16)
  270. #define SD_CONTROL_STATUS2_MODE_DDR50 (0x4 << 16)
  271. #define SD_CONTROL_STATUS2_1_8V_ENABLE (1 << 19)
  272. #define SD_CONTROL_STATUS2_DRIVER_B (0x0 << 20)
  273. #define SD_CONTROL_STATUS2_DRIVER_A (0x1 << 20)
  274. #define SD_CONTROL_STATUS2_DRIVER_C (0x2 << 20)
  275. #define SD_CONTROL_STATUS2_DRIVER_D (0x3 << 20)
  276. #define SD_CONTROL_STATUS2_EXECUTE_TUNING (1 << 22)
  277. #define SD_CONTROL_STATUS2_SAMPLING_CLOCK_SELECT (1 << 23)
  278. #define SD_CONTROL_STATUS2_ASYNC_INTERRUPTS (1 << 30)
  279. #define SD_CONTROL_STATUS2_PRESET_VALUE_ENABLE (1 << 31)
  280. //
  281. // SD Host controller version register definitions.
  282. //
  283. #define SD_HOST_VERSION_MASK 0x00FF
  284. //
  285. // SD operating condition flags.
  286. //
  287. #define SD_OPERATING_CONDITION_BUSY 0x80000000
  288. #define SD_OPERATING_CONDITION_HIGH_CAPACITY 0x40000000
  289. #define SD_OPERATING_CONDITION_VOLTAGE_MASK 0x007FFF80
  290. #define SD_OPERATING_CONDITION_ACCESS_MODE 0x60000000
  291. #define SD_OPERATING_CONDITION_1_8V 0x01000000
  292. //
  293. // SD configuration register values.
  294. //
  295. #define SD_CONFIGURATION_REGISTER_CMD23 0x00000002
  296. #define SD_CONFIGURATION_REGISTER_VERSION3_SHIFT 15
  297. #define SD_CONFIGURATION_REGISTER_DATA_4BIT 0x00040000
  298. #define SD_CONFIGURATION_REGISTER_VERSION_SHIFT 24
  299. #define SD_CONFIGURATION_REGISTER_VERSION_MASK 0xF
  300. //
  301. // Define SD response flags.
  302. //
  303. #define SD_RESPONSE_PRESENT (1 << 0)
  304. #define SD_RESPONSE_136_BIT (1 << 1)
  305. #define SD_RESPONSE_VALID_CRC (1 << 2)
  306. #define SD_RESPONSE_BUSY (1 << 3)
  307. #define SD_RESPONSE_OPCODE (1 << 4)
  308. #define SD_RESPONSE_NONE 0
  309. #define SD_RESPONSE_R1 \
  310. (SD_RESPONSE_PRESENT | SD_RESPONSE_VALID_CRC | SD_RESPONSE_OPCODE)
  311. #define SD_RESPONSE_R1B \
  312. (SD_RESPONSE_PRESENT | SD_RESPONSE_VALID_CRC | SD_RESPONSE_OPCODE | \
  313. SD_RESPONSE_BUSY)
  314. #define SD_RESPONSE_R2 \
  315. (SD_RESPONSE_PRESENT | SD_RESPONSE_VALID_CRC | SD_RESPONSE_136_BIT)
  316. #define SD_RESPONSE_R3 SD_RESPONSE_PRESENT
  317. #define SD_RESPONSE_R4 SD_RESPONSE_PRESENT
  318. #define SD_RESPONSE_R5 \
  319. (SD_RESPONSE_PRESENT | SD_RESPONSE_VALID_CRC | SD_RESPONSE_OPCODE)
  320. #define SD_RESPONSE_R6 \
  321. (SD_RESPONSE_PRESENT | SD_RESPONSE_VALID_CRC | SD_RESPONSE_OPCODE)
  322. #define SD_RESPONSE_R7 \
  323. (SD_RESPONSE_PRESENT | SD_RESPONSE_VALID_CRC | SD_RESPONSE_OPCODE)
  324. //
  325. // Define the R1 response bits.
  326. //
  327. #define SD_RESPONSE_R1_IDLE 0x01
  328. #define SD_RESPONSE_R1_ERASE_RESET 0x02
  329. #define SD_RESPONSE_R1_ILLEGAL_COMMAND 0x04
  330. #define SD_RESPONSE_R1_CRC_ERROR 0x08
  331. #define SD_RESPONSE_R1_ERASE_SEQUENCE_ERROR 0x10
  332. #define SD_RESPONSE_R1_ADDRESS_ERROR 0x20
  333. #define SD_RESPONSE_R1_PARAMETER_ERROR 0x40
  334. #define SD_RESPONSE_R1_ERROR_MASK 0x7E
  335. //
  336. // Define the SD CMD8 check argument.
  337. //
  338. #define SD_COMMAND8_ARGUMENT 0x1AA
  339. //
  340. // Define Card Specific Data (CSD) fields coming out of the response words.
  341. //
  342. #define SD_CARD_SPECIFIC_DATA_0_FREQUENCY_BASE_MASK 0x7
  343. #define SD_CARD_SPECIFIC_DATA_0_FREQUENCY_MULTIPLIER_SHIFT 3
  344. #define SD_CARD_SPECIFIC_DATA_0_FREQUENCY_MULTIPLIER_MASK 0xF
  345. #define SD_CARD_SPECIFIC_DATA_0_MMC_VERSION_SHIFT 26
  346. #define SD_CARD_SPECIFIC_DATA_0_MMC_VERSION_MASK 0xF
  347. #define SD_CARD_SPECIFIC_DATA_1_READ_BLOCK_LENGTH_SHIFT 16
  348. #define SD_CARD_SPECIFIC_DATA_1_READ_BLOCK_LENGTH_MASK 0x0F
  349. #define SD_CARD_SPECIFIC_DATA_1_WRITE_BLOCK_LENGTH_SHIFT 22
  350. #define SD_CARD_SPECIFIC_DATA_1_WRITE_BLOCK_LENGTH_MASK 0x0F
  351. #define SD_CARD_SPECIFIC_DATA_1_HIGH_CAPACITY_MASK 0x3F
  352. #define SD_CARD_SPECIFIC_DATA_1_HIGH_CAPACITY_SHIFT 16
  353. #define SD_CARD_SPECIFIC_DATA_2_HIGH_CAPACITY_MASK 0xFFFF0000
  354. #define SD_CARD_SPECIFIC_DATA_2_HIGH_CAPACITY_SHIFT 16
  355. #define SD_CARD_SPECIFIC_DATA_HIGH_CAPACITY_MULTIPLIER 8
  356. #define SD_CARD_SPECIFIC_DATA_1_CAPACITY_MASK 0x3FF
  357. #define SD_CARD_SPECIFIC_DATA_1_CAPACITY_SHIFT 2
  358. #define SD_CARD_SPECIFIC_DATA_2_CAPACITY_MASK 0xC0000000
  359. #define SD_CARD_SPECIFIC_DATA_2_CAPACITY_SHIFT 30
  360. #define SD_CARD_SPECIFIC_DATA_2_CAPACITY_MULTIPLIER_MASK 0x00038000
  361. #define SD_CARD_SPECIFIC_DATA_2_CAPACITY_MULTIPLIER_SHIFT 15
  362. #define SD_CARD_SPECIFIC_DATA_2_ERASE_GROUP_SIZE_MASK 0x00007C00
  363. #define SD_CARD_SPECIFIC_DATA_2_ERASE_GROUP_SIZE_SHIFT 10
  364. #define SD_CARD_SPECIFIC_DATA_2_ERASE_GROUP_MULTIPLIER_MASK 0x000003E0
  365. #define SD_CARD_SPECIFIC_DATA_2_ERASE_GROUP_MULTIPLIER_SHIFT 5
  366. //
  367. // Define Extended Card specific data fields.
  368. //
  369. #define SD_MMC_EXTENDED_CARD_DATA_GENERAL_PARTITION_SIZE 143
  370. #define SD_MMC_EXTENDED_CARD_DATA_PARTITIONS_ATTRIBUTE 156
  371. #define SD_MMC_EXTENDED_CARD_DATA_PARTITIONING_SUPPORT 160
  372. #define SD_MMC_EXTENDED_CARD_DATA_RPMB_SIZE 168
  373. #define SD_MMC_EXTENDED_CARD_DATA_ERASE_GROUP_DEF 175
  374. #define SD_MMC_EXTENDED_CARD_DATA_PARTITION_CONFIGURATION 179
  375. #define SD_MMC_EXTENDED_CARD_DATA_BUS_WIDTH 183
  376. #define SD_MMC_EXTENDED_CARD_DATA_HIGH_SPEED 185
  377. #define SD_MMC_EXTENDED_CARD_DATA_REVISION 192
  378. #define SD_MMC_EXTENDED_CARD_DATA_CARD_TYPE 196
  379. #define SD_MMC_EXTENDED_CARD_DATA_SECTOR_COUNT 212
  380. #define SD_MMC_EXTENDED_CARD_DATA_WRITE_PROTECT_GROUP_SIZE 221
  381. #define SD_MMC_EXTENDED_CARD_DATA_ERASE_GROUP_SIZE 224
  382. #define SD_MMC_EXTENDED_CARD_DATA_BOOT_SIZE 226
  383. #define SD_MMC_EXTENDED_CARD_DATA_PARTITION_SHIFT 17
  384. #define SD_MMC_GENERAL_PARTITION_COUNT 4
  385. #define SD_MMC_CSD_WORDS 4
  386. #define SD_MMC_EXTENDED_SECTOR_COUNT_MINIMUM \
  387. (1024ULL * 1024ULL * 1024ULL * 2ULL)
  388. #define SD_MMC_PARTITION_NONE 0xFF
  389. #define SD_MMC_PARTITION_SUPPORT 0x01
  390. #define SD_MMC_PARTITION_ACCESS_MASK 0x07
  391. #define SD_MMC_PARTITION_ENHANCED_ATTRIBUTE 0x1F
  392. #define SD_MMC_EXTENDED_CARD_DATA_CARD_TYPE_MASK 0x0F
  393. #define SD_MMC_CARD_TYPE_HIGH_SPEED_52MHZ 0x02
  394. #define SD_MMC_EXTENDED_CARD_DATA_BUS_WIDTH_8 2
  395. #define SD_MMC_EXTENDED_CARD_DATA_BUS_WIDTH_4 1
  396. #define SD_MMC_EXTENDED_CARD_DATA_BUS_WIDTH_1 0
  397. //
  398. // Define switch command parameters.
  399. //
  400. //
  401. // Switch the command set.
  402. //
  403. #define SD_MMC_SWITCH_MODE_COMMAND_SET 0x00
  404. //
  405. // Set bits in the extended CSD.
  406. //
  407. #define SD_MMC_SWITCH_MODE_SET_BITS 0x01
  408. //
  409. // Clear bits in the extended CSD.
  410. //
  411. #define SD_MMC_SWITCH_MODE_CLEAR_BITS 0x02
  412. //
  413. // Set a byte's value in the extended CSD.
  414. //
  415. #define SD_MMC_SWITCH_MODE_WRITE_BYTE 0x03
  416. #define SD_MMC_SWITCH_MODE_SHIFT 24
  417. #define SD_MMC_SWITCH_INDEX_SHIFT 16
  418. #define SD_MMC_SWITCH_VALUE_SHIFT 8
  419. #define SD_SWITCH_CHECK 0
  420. #define SD_SWITCH_SWITCH 1
  421. #define SD_SWITCH_STATUS_3_HIGH_SPEED_SUPPORTED 0x00020000
  422. #define SD_SWITCH_STATUS_4_HIGH_SPEED_MASK 0x0F000000
  423. #define SD_SWITCH_STATUS_4_HIGH_SPEED_VALUE 0x01000000
  424. #define SD_SWITCH_STATUS_7_HIGH_SPEED_BUSY 0x00020000
  425. //
  426. // Status command response bits.
  427. //
  428. #define SD_STATUS_SEQ_ERROR (1 << 3)
  429. #define SD_STATUS_APP_CMD (1 << 5)
  430. #define SD_STATUS_READY_FOR_DATA (1 << 8)
  431. #define SD_STATUS_CURRENT_STATE (0xF << 9)
  432. #define SD_STATUS_ERASE_RESET (1 << 13)
  433. #define SD_STATUS_CARD_ECC_DISABLE (1 << 14)
  434. #define SD_STATUS_WP_ERASE_SKIP (1 << 15)
  435. #define SD_STATUS_CSD_OVERWRITE (1 << 16)
  436. #define SD_STATUS_ERROR (1 << 19)
  437. #define SD_STATUS_CC_ERROR (1 << 20)
  438. #define SD_STATUS_CARD_ECC_FAILED (1 << 21)
  439. #define SD_STATUS_ILLEGAL_COMMAND (1 << 22)
  440. #define SD_STATUS_COMMAND_CRC_ERROR (1 << 23)
  441. #define SD_STATUS_LOCK_UNLOCK_FAILED (1 << 24)
  442. #define SD_STATUS_CARD_IS_LOCKED (1 << 25)
  443. #define SD_STATUS_WP_VIOLATION (1 << 26)
  444. #define SD_STATUS_ERASE_PARAM (1 << 27)
  445. #define SD_STATUS_ERASE_SEQ_ERROR (1 << 28)
  446. #define SD_STATUS_BLOCK_LENGTH_ERROR (1 << 29)
  447. #define SD_STATUS_ADDRESS_ERROR (1 << 30)
  448. #define SD_STATUS_OUT_OF_RANGE (1 << 31)
  449. #define SD_STATUS_ERROR_MASK \
  450. (SD_STATUS_SEQ_ERROR | SD_STATUS_ERROR | SD_STATUS_CC_ERROR | \
  451. SD_STATUS_CARD_ECC_FAILED | SD_STATUS_ILLEGAL_COMMAND | \
  452. SD_STATUS_COMMAND_CRC_ERROR | SD_STATUS_LOCK_UNLOCK_FAILED | \
  453. SD_STATUS_WP_VIOLATION | SD_STATUS_ERASE_PARAM | \
  454. SD_STATUS_ERASE_SEQ_ERROR | SD_STATUS_BLOCK_LENGTH_ERROR | \
  455. SD_STATUS_ADDRESS_ERROR | SD_STATUS_OUT_OF_RANGE)
  456. #define SD_STATUS_STATE_IDLE (0x0 << 9)
  457. #define SD_STATUS_STATE_READY (0x1 << 9)
  458. #define SD_STATUS_STATE_IDENTIFY (0x2 << 9)
  459. #define SD_STATUS_STATE_STANDBY (0x3 << 9)
  460. #define SD_STATUS_STATE_TRANSFER (0x4 << 9)
  461. #define SD_STATUS_STATE_DATA (0x5 << 9)
  462. #define SD_STATUS_STATE_RECEIVE (0x6 << 9)
  463. #define SD_STATUS_STATE_PROGRAM (0x7 << 9)
  464. #define SD_STATUS_STATE_DISABLED (0x8 << 9)
  465. //
  466. // ADMA2 attributes.
  467. //
  468. #define SD_ADMA2_VALID 0x00000001
  469. #define SD_ADMA2_END 0x00000002
  470. #define SD_ADMA2_INTERRUPT 0x00000004
  471. #define SD_ADMA2_ACTION_MASK (0x3 << 4)
  472. #define SD_ADMA2_ACTION_NOP (0 << 4)
  473. #define SD_ADMA2_ACTION_TRANSFER (2 << 4)
  474. #define SD_ADMA2_ACTION_LINK (3 << 4)
  475. #define SD_ADMA2_LENGTH_SHIFT 16
  476. //
  477. // Define the maximum transfer length for SDMA.
  478. //
  479. #define SD_SDMA_MAX_TRANSFER_SIZE 0x80000
  480. //
  481. // Define the maximum transfer length to put in one descriptor. Technically
  482. // it's 0xFFFF, but round it down to the nearest page for better arithmetic.
  483. //
  484. #define SD_ADMA2_MAX_TRANSFER_SIZE 0xF000
  485. #define SD_MAX_CMD23_BLOCKS 0x003FFFFF
  486. //
  487. // ------------------------------------------------------ Data Type Definitions
  488. //
  489. typedef enum _SD_REGISTER {
  490. SdRegisterSdmaAddress = 0x00,
  491. SdRegisterArgument2 = 0x00,
  492. SdRegisterBlockSizeCount = 0x04,
  493. SdRegisterArgument1 = 0x08,
  494. SdRegisterCommand = 0x0C,
  495. SdRegisterResponse10 = 0x10,
  496. SdRegisterResponse32 = 0x14,
  497. SdRegisterResponse54 = 0x18,
  498. SdRegisterResponse76 = 0x1C,
  499. SdRegisterBufferDataPort = 0x20,
  500. SdRegisterPresentState = 0x24,
  501. SdRegisterHostControl = 0x28,
  502. SdRegisterClockControl = 0x2C,
  503. SdRegisterInterruptStatus = 0x30,
  504. SdRegisterInterruptStatusEnable = 0x34,
  505. SdRegisterInterruptSignalEnable = 0x38,
  506. SdRegisterControlStatus2 = 0x3C,
  507. SdRegisterCapabilities = 0x40,
  508. SdRegisterCapabilities2 = 0x44,
  509. SdRegisterMaxCapabilities = 0x48,
  510. SdRegisterMaxCapabilities2 = 0x4C,
  511. SdRegisterForceEvent = 0x50,
  512. SdRegisterAdmaErrorStatus = 0x54,
  513. SdRegisterAdmaAddressLow = 0x58,
  514. SdRegisterAdmaAddressHigh = 0x5C,
  515. SdRegisterSharedBusControl = 0xE0,
  516. SdRegisterSlotStatusVersion = 0xFC,
  517. SdRegisterSize = 0x100
  518. } SD_REGISTER, *PSD_REGISTER;
  519. typedef enum _SD_COMMAND_VALUE {
  520. SdCommandReset = 0,
  521. SdCommandSendMmcOperatingCondition = 1,
  522. SdCommandAllSendCardIdentification = 2,
  523. SdCommandSetRelativeAddress = 3,
  524. SdCommandSwitch = 6,
  525. SdCommandSetBusWidth = 6,
  526. SdCommandSelectCard = 7,
  527. SdCommandSendInterfaceCondition = 8,
  528. SdCommandMmcSendExtendedCardSpecificData = 8,
  529. SdCommandSendCardSpecificData = 9,
  530. SdCommandSendCardIdentification = 10,
  531. SdCommandVoltageSwitch = 11,
  532. SdCommandStopTransmission = 12,
  533. SdCommandSendStatus = 13,
  534. SdCommandSetBlockLength = 16,
  535. SdCommandReadSingleBlock = 17,
  536. SdCommandReadMultipleBlocks = 18,
  537. SdCommandSetBlockCount = 23,
  538. SdCommandWriteSingleBlock = 24,
  539. SdCommandWriteMultipleBlocks = 25,
  540. SdCommandEraseGroupStart = 35,
  541. SdCommandEraseGroupEnd = 36,
  542. SdCommandErase = 38,
  543. SdCommandSendSdOperatingCondition = 41,
  544. SdCommandSendSdConfigurationRegister = 51,
  545. SdCommandApplicationSpecific = 55,
  546. SdCommandSpiReadOperatingCondition = 58,
  547. SdCommandSpiCrcOnOff = 59,
  548. } SD_COMMAND_VALUE, *PSD_COMMAND_VALUE;
  549. typedef enum _SD_VERSION {
  550. SdVersionInvalid,
  551. SdVersion1p0,
  552. SdVersion1p10,
  553. SdVersion2,
  554. SdVersion3,
  555. SdVersionMaximum,
  556. SdMmcVersionMinimum,
  557. SdMmcVersion1p2,
  558. SdMmcVersion1p4,
  559. SdMmcVersion2p2,
  560. SdMmcVersion3,
  561. SdMmcVersion4,
  562. SdMmcVersion4p1,
  563. SdMmcVersion4p2,
  564. SdMmcVersion4p3,
  565. SdMmcVersion4p41,
  566. SdMmcVersion4p5,
  567. SdMmcVersionMaximum
  568. } SD_VERSION, *PSD_VERSION;
  569. typedef enum _SD_HOST_VERSION {
  570. SdHostVersion1 = 0x0,
  571. SdHostVersion2 = 0x1,
  572. SdHostVersion3 = 0x2,
  573. } SD_HOST_VERSION, *PSD_HOST_VERSION;
  574. typedef enum _SD_CLOCK_SPEED {
  575. SdClockInvalid,
  576. SdClock400kHz = 400000,
  577. SdClock25MHz = 25000000,
  578. SdClock26MHz = 26000000,
  579. SdClock50MHz = 50000000,
  580. SdClock52MHz = 52000000,
  581. } SD_CLOCK_SPEED, *PSD_CLOCK_SPEED;
  582. //
  583. // -------------------------------------------------------------------- Globals
  584. //
  585. //
  586. // -------------------------------------------------------- Function Prototypes
  587. //