entry.S 2.5 KB

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  1. /*++
  2. Copyright (c) 2014 Minoca Corp. All Rights Reserved
  3. Module Name:
  4. entry.S
  5. Abstract:
  6. This module implements the initial entry point into the ARMv6 firmware. Its
  7. job is to do essential initialization and call the C main function.
  8. Author:
  9. Chris Stevens 31-Dec-2014
  10. Environment:
  11. Firmware
  12. --*/
  13. ##
  14. ## ------------------------------------------------------------------- Includes
  15. ##
  16. #include <minoca/kernel/arm.inc>
  17. ##
  18. ## ---------------------------------------------------------------- Definitions
  19. ##
  20. .equ STACK_SIZE, 0x4000
  21. ##
  22. ## .text specifies that this code belongs in the executable section. This is
  23. ## the only section in the MBR code, data also lives in the text section.
  24. ## .arm specifies that this code should be compiled in ARM mode.
  25. ##
  26. .text
  27. .arm
  28. ##
  29. ## .global allows this label to be visible to the linker. _start is the entry
  30. ## point to the MBR code, so it needs to be globally visible.
  31. ##
  32. .global _start
  33. ##
  34. ## This is the entry point for the ARM firmware. It changes to SVC mode,
  35. ## sets up the initial stack, and jumps to the firmware core.
  36. ##
  37. _start:
  38. ##
  39. ## Disable interrupts and switch to SVC mode.
  40. ##
  41. mov %r2, #(PSR_FLAG_IRQ | ARM_MODE_SVC)
  42. msr CPSR_c, %r2
  43. ##
  44. ## Limit the cache to 16K until page coloring is supported.
  45. ##
  46. mrc p15, 0, %r0, %cr1, %cr0, 1
  47. orr %r0, %r0, #ARMV6_AUX_16K_CACHE_SIZE
  48. mcr p15, 0, %r0, %cr1, %cr0, 1
  49. ##
  50. ## Flip some essential MMU bits allowing unaligned accesses.
  51. ##
  52. mrc p15, 0, %r0, %cr1, %cr0, 0
  53. bic %r0, %r0, #MMU_ALIGNMENT_FAULT_ENABLED
  54. orr %r0, %r0, #MMU_UNALIGNED_ACCESS_ENABLED
  55. mcr p15, 0, %r0, %cr1, %cr0, 0
  56. ##
  57. ## Zero out the BSS section.
  58. ##
  59. ldr %r1, =__bss_start__
  60. ldr %r2, =__bss_end__
  61. mov %r0, #0
  62. BssZeroLoop:
  63. str %r0, [%r1], #4
  64. cmp %r1, %r2
  65. blt BssZeroLoop
  66. ##
  67. ## The stack starts at the image base and works downwards.
  68. ##
  69. adr %r0, _start @ Get the current address for the stack top.
  70. ldr %r1, =STACK_SIZE @ Get the stack size.
  71. mov %sp, %r0 @ Set the stack.
  72. mov %r11, #0 @ Zero the ARM frame pointer.
  73. mov %r7, #0 @ Zero out the Thumb frame pointer.
  74. mov %r2, %r7 @ Zero out another temporary register.
  75. push {%r2, %r7} @ Create an empty stack frame for debugging.
  76. blx EfiRpiMain
  77. LoopForever:
  78. b LoopForever