ehci.h 13 KB

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  1. /*++
  2. Copyright (c) 2013 Minoca Corp.
  3. This file is licensed under the terms of the GNU General Public License
  4. version 3. Alternative licensing terms are available. Contact
  5. info@minocacorp.com for details. See the LICENSE file at the root of this
  6. project for complete licensing information.
  7. Module Name:
  8. ehci.h
  9. Abstract:
  10. This header contains internal definitions for the EHCI USB Host Controller
  11. driver.
  12. Author:
  13. Evan Green 18-Mar-2013
  14. --*/
  15. //
  16. // ------------------------------------------------------------------- Includes
  17. //
  18. #include "ehcihw.h"
  19. #include "ehcidbg.h"
  20. #include <minoca/kernel/kdebug.h>
  21. #include <minoca/kernel/kdusb.h>
  22. //
  23. // ---------------------------------------------------------------- Definitions
  24. //
  25. //
  26. // Define the EHCI allocation tag.
  27. //
  28. #define EHCI_ALLOCATION_TAG 0x69636845 // 'ichE'
  29. #define EHCI_BLOCK_ALLOCATION_TAG 0x6C426845 // 'lBhE'
  30. //
  31. // Define the block expansion count for the EHCI transfer and queue block
  32. // allocator. This is defined in number of blocks.
  33. //
  34. #define EHCI_BLOCK_ALLOCATOR_EXPANSION_COUNT 40
  35. //
  36. // Define the required alignment for EHCI transfers and queues.
  37. //
  38. #define EHCI_BLOCK_ALLOCATOR_ALIGNMENT EHCI_LINK_ALIGNMENT
  39. //
  40. // Define the number of levels in the periodic schedule tree.
  41. //
  42. #define EHCI_PERIODIC_SCHEDULE_TREE_DEPTH 8
  43. //
  44. // Define the set of flags for the EHCI transfer set.
  45. //
  46. #define EHCI_TRANSFER_SET_FLAG_QUEUED 0x00000001
  47. #define EHCI_TRANSFER_SET_FLAG_CANCELLING 0x00000002
  48. //
  49. // ------------------------------------------------------ Data Type Definitions
  50. //
  51. typedef struct _EHCI_TRANSFER_SET EHCI_TRANSFER_SET, *PEHCI_TRANSFER_SET;
  52. /*++
  53. Structure Description:
  54. This structure stores information about an EHCI transfer.
  55. Members:
  56. GlobalListEntry - Stores pointers to the next and previous transfers in the
  57. global list of in-flight transfers.
  58. EndpointListEntry - Stores pointers to the next and previous transfers in
  59. the endpoint queue.
  60. Set - Stores a pointer to the transfer set that this transfer is a part of.
  61. HardwareTransfer - Stores a pointer to the hardware defined transfer
  62. descriptor.
  63. PhysicalAddress - Stores the physical address of the hardware transfer
  64. descriptor.
  65. TransferLength - Stores the length of the transfer (as the hardware
  66. decrements the field towards 0).
  67. LastTransfer - Stores a boolean indicating whether this is the last
  68. transfer submitted in the set.
  69. --*/
  70. typedef struct _EHCI_TRANSFER {
  71. LIST_ENTRY GlobalListEntry;
  72. LIST_ENTRY EndpointListEntry;
  73. PEHCI_TRANSFER_SET Set;
  74. PEHCI_TRANSFER_DESCRIPTOR HardwareTransfer;
  75. PHYSICAL_ADDRESS PhysicalAddress;
  76. ULONG TransferLength;
  77. BOOL LastTransfer;
  78. } EHCI_TRANSFER, *PEHCI_TRANSFER;
  79. /*++
  80. Structure Description:
  81. This structure stores information about an EHCI transfer queue.
  82. Members:
  83. ListEntry - Stores pointers to the next and previous transfer queue
  84. attached to the EHCI controller.
  85. DummyTransfer - Stores a pointer to the current inactive dummy transfer
  86. that gets left on every queue. This dummy transfer is needed so that
  87. additional sets of transfers can be added to a queue without race
  88. conditions. The dummy transfer rotates around as sets of transfers are
  89. added, as the first transfer in that set becomes the new dummy.
  90. HardwareQueueHead - Stores a pointer to the hardware defined transfer queue
  91. head. This is unused for isochronous transfers.
  92. PhysicalAddress - Stores the physical address of the hardware queue head.
  93. AsyncOnAdvanceCancel - Stores a boolean indicating whether or not the queue
  94. is being processed by the "async on advance" interrupt due to
  95. cancellation (TRUE) or destruction (FALSE).
  96. --*/
  97. typedef struct _EHCI_TRANSFER_QUEUE {
  98. LIST_ENTRY ListEntry;
  99. PEHCI_TRANSFER DummyTransfer;
  100. PEHCI_QUEUE_HEAD HardwareQueueHead;
  101. PHYSICAL_ADDRESS PhysicalAddress;
  102. BOOL AsyncOnAdvanceCancel;
  103. } EHCI_TRANSFER_QUEUE, *PEHCI_TRANSFER_QUEUE;
  104. /*++
  105. Structure Description:
  106. This structure stores information about an EHCI endpoint.
  107. Members:
  108. ListEntry - Stores pointers to the next and previous endpoints attached to
  109. the EHCI controller.
  110. TransferListHead - Stores the head of the list of transfers on this queue.
  111. Queue - Stores the EHCI transfer queue for this endpoint.
  112. TransferType - Stores the transfer type of the endpoint.
  113. Speed - Stores the speed of the device exposing the endpoint.
  114. MaxPacketSize - Stores the maximum number of bytes that can be moved in a
  115. packet for this endpoint.
  116. PollRate - Stores the interrupt poll rate, in (micro)frames.
  117. EndpointNumber - Stores the endpoint number, as defined by the USB device.
  118. --*/
  119. typedef struct _EHCI_ENDPOINT {
  120. LIST_ENTRY ListEntry;
  121. LIST_ENTRY TransferListHead;
  122. EHCI_TRANSFER_QUEUE Queue;
  123. USB_TRANSFER_TYPE TransferType;
  124. USB_DEVICE_SPEED Speed;
  125. ULONG MaxPacketSize;
  126. ULONG PollRate;
  127. UCHAR EndpointNumber;
  128. } EHCI_ENDPOINT, *PEHCI_ENDPOINT;
  129. /*++
  130. Structure Description:
  131. This structure stores a collection of EHCI transfers that together
  132. comprise a USB transfer.
  133. Members:
  134. ListEntry - Stores pointers to the next and previous transfer sets in
  135. whatever list of transfer sets this set is in (usually the set of
  136. lists waiting to be processed once the async advance doorbel is rung).
  137. TransferCount - Stores the number of elements in the transfer array.
  138. Flags - Stores a bitmask of flags for the transfer set. See
  139. EHCI_TRANSFER_SET_FLAG_* for definitions.
  140. UsbTransfer - Stores a pointer to the transfer as defined by the USB core
  141. library. Several EHCI transfers may constitute and point to a single USB
  142. transfer.
  143. Endpoint - Stores a pointer to the endpoint that owns this set of transfers.
  144. Transfer - Stores an array of pointers to EHCI transfers.
  145. --*/
  146. struct _EHCI_TRANSFER_SET {
  147. LIST_ENTRY ListEntry;
  148. ULONG TransferCount;
  149. ULONG Flags;
  150. PUSB_TRANSFER_INTERNAL UsbTransfer;
  151. PEHCI_ENDPOINT Endpoint;
  152. PEHCI_TRANSFER Transfer[ANYSIZE_ARRAY];
  153. };
  154. /*++
  155. Structure Description:
  156. This structure stores USB state for an EHCI controller.
  157. Members:
  158. RegisterBase - Stores the virtual address where the Operational Registers
  159. are mapped.
  160. PhysicalBase - Stores the physical address of the base of the registers
  161. (the base of EHCI itself, not the operational registers).
  162. PeriodicSchedule - Stores a pointer to the frame list schedule used by the
  163. controller.
  164. PeriodicScheduleIoBuffer - Stores a pointer to the I/O buffer containing the
  165. periodic schedule.
  166. AsynchronousSchedule - Stores the empty transfer queue that represents the
  167. head of the asynchronous schedule.
  168. IsochronousTransferListHead - Stores the list head of all active
  169. Isochronous transfers in the schedule.
  170. BlockAllocator - Stores a pointer to the block allocator used to
  171. allocate all queues and transfers.
  172. TransferListHead - Stores the global list of active transfers on the
  173. schedule.
  174. AsyncOnAdvanceReadyListHead - Stores the list of transfer queues that have
  175. been removed from the asynchronous schedule and that the host
  176. controller can no longer reach.
  177. AsyncOnAdvancePendingListHead - Stores the list of transfer queues that
  178. have been removed from the asynchronous schedule, but that the host
  179. controller may still be able to reach.
  180. QueuesToDestroyListHead - Stores the list of transfer queues that need to
  181. be destroyed by the destroy queues work item.
  182. Lock - Stores the lock that protects access to all list entries under this
  183. controller. It must be a spin lock because it synchronizes with a DPC,
  184. which cannot block.
  185. UsbCoreHandle - Stores the handle returned by the USB core that identifies
  186. this controller.
  187. CommandRegister - Stores the current state of the USB command register
  188. (to avoid unnecessary reads).
  189. PendingStatusBits - Stores the bits in the USB status register that have
  190. not yet been addressed by the DPC.
  191. InterruptHandle - Stores the interrupt handle of the connected interrupt.
  192. InterruptTree - Stores an array of empty transfer queues at each level of
  193. the periodic schedule tree. Think of each frame in the schedule as a
  194. leaf node, and each leaf node points at a more common entry, which
  195. points at an even more common entry, etc. The last entry in this array
  196. is polled every millisecond, the next last one every 2ms, then every
  197. 4ms, etc.
  198. DestroyQueuesWorkItem - Stores a pointer to a work item that destroys queue
  199. heads that have been completely removed from the schedule.
  200. PortCount - Stores the number of ports on the EHCI host controller.
  201. EndpointCount - Stores the number of active endpoints in the controller.
  202. EndpointListHead - Stores the head of the list of endpoints.
  203. HandoffData - Stores an optional pointer to the kernel debugger handoff
  204. data.
  205. --*/
  206. typedef struct _EHCI_CONTROLLER {
  207. PVOID RegisterBase;
  208. PHYSICAL_ADDRESS PhysicalBase;
  209. PEHCI_PERIODIC_SCHEDULE PeriodicSchedule;
  210. PIO_BUFFER PeriodicScheduleIoBuffer;
  211. EHCI_TRANSFER_QUEUE AsynchronousSchedule;
  212. LIST_ENTRY IsochronousTransferListHead;
  213. PBLOCK_ALLOCATOR BlockAllocator;
  214. LIST_ENTRY TransferListHead;
  215. LIST_ENTRY AsyncOnAdvanceReadyListHead;
  216. LIST_ENTRY AsyncOnAdvancePendingListHead;
  217. LIST_ENTRY QueuesToDestroyListHead;
  218. KSPIN_LOCK Lock;
  219. HANDLE UsbCoreHandle;
  220. ULONG CommandRegister;
  221. volatile ULONG PendingStatusBits;
  222. HANDLE InterruptHandle;
  223. EHCI_TRANSFER_QUEUE InterruptTree[EHCI_PERIODIC_SCHEDULE_TREE_DEPTH];
  224. PWORK_ITEM DestroyQueuesWorkItem;
  225. ULONG PortCount;
  226. ULONG EndpointCount;
  227. LIST_ENTRY EndpointListHead;
  228. PEHCI_DEBUG_HANDOFF_DATA HandoffData;
  229. } EHCI_CONTROLLER, *PEHCI_CONTROLLER;
  230. //
  231. // -------------------------------------------------------------------- Globals
  232. //
  233. extern PDRIVER EhciDriver;
  234. //
  235. // -------------------------------------------------------- Function Prototypes
  236. //
  237. PEHCI_CONTROLLER
  238. EhcipInitializeControllerState (
  239. PVOID OperationalRegisterBase,
  240. PHYSICAL_ADDRESS RegisterBasePhysical,
  241. ULONG PortCount,
  242. PDEBUG_USB_HANDOFF_DATA HandoffData
  243. );
  244. /*++
  245. Routine Description:
  246. This routine initializes the state and variables needed to start up an EHCI
  247. host controller.
  248. Arguments:
  249. OperationalRegisterBase - Supplies the virtual address of the base of the
  250. operational registers.
  251. RegisterBasePhysical - Supplies the physical address of the base of the
  252. EHCI registers (not the operational registers).
  253. PortCount - Supplies the number of ports on the EHCI controller.
  254. HandoffData - Supplies an optional pointer to the debug handoff data if the
  255. kernel debugger is using this controller.
  256. Return Value:
  257. Returns a pointer to the EHCI controller state object on success.
  258. NULL on failure.
  259. --*/
  260. VOID
  261. EhcipDestroyControllerState (
  262. PEHCI_CONTROLLER Controller
  263. );
  264. /*++
  265. Routine Description:
  266. This routine destroys the memory associated with an EHCI controller.
  267. Arguments:
  268. Controller - Supplies a pointer to the EHCI controller state to release.
  269. Return Value:
  270. None.
  271. --*/
  272. KSTATUS
  273. EhcipRegisterController (
  274. PEHCI_CONTROLLER Controller,
  275. PDEVICE Device
  276. );
  277. /*++
  278. Routine Description:
  279. This routine registers the started EHCI controller with the core USB
  280. library.
  281. Arguments:
  282. Controller - Supplies a pointer to the EHCI controller state of the
  283. controller to register.
  284. Device - Supplies a pointer to the device object.
  285. Return Value:
  286. Status code.
  287. --*/
  288. VOID
  289. EhcipSetInterruptHandle (
  290. PEHCI_CONTROLLER Controller,
  291. HANDLE InterruptHandle
  292. );
  293. /*++
  294. Routine Description:
  295. This routine saves the handle of the connected interrupt in the EHCI
  296. controller.
  297. Arguments:
  298. Controller - Supplies a pointer to the EHCI controller state.
  299. InterruptHandle - Supplies the connected interrupt handle.
  300. Return Value:
  301. None.
  302. --*/
  303. KSTATUS
  304. EhcipResetController (
  305. PEHCI_CONTROLLER Controller
  306. );
  307. /*++
  308. Routine Description:
  309. This routine resets and starts the EHCI controller.
  310. Arguments:
  311. Controller - Supplies a pointer to the EHCI controller state of the
  312. controller to reset.
  313. Return Value:
  314. Status code.
  315. --*/
  316. INTERRUPT_STATUS
  317. EhcipInterruptService (
  318. PVOID Context
  319. );
  320. /*++
  321. Routine Description:
  322. This routine implements the EHCI interrupt service routine.
  323. Arguments:
  324. Context - Supplies the context pointer given to the system when the
  325. interrupt was connected. In this case, this points to the EHCI
  326. controller.
  327. Return Value:
  328. Interrupt status.
  329. --*/
  330. INTERRUPT_STATUS
  331. EhcipInterruptServiceDpc (
  332. PVOID Parameter
  333. );
  334. /*++
  335. Routine Description:
  336. This routine implements the EHCI dispatch level interrupt service.
  337. Arguments:
  338. Parameter - Supplies the context, in this case the EHCI controller
  339. structure.
  340. Return Value:
  341. None.
  342. --*/