hmod.h 58 KB

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  1. /*++
  2. Copyright (c) 2012 Minoca Corp. All Rights Reserved
  3. Module Name:
  4. hmod.h
  5. Abstract:
  6. This header contains definitions for external hardware modules. These are
  7. not drivers, but rather pieces of hardware core to the basic operation of
  8. the kernel, including timers, interrupt controllers, DMA controllers, and
  9. debug devices.
  10. Author:
  11. Evan Green 28-Oct-2012
  12. --*/
  13. //
  14. // ------------------------------------------------------------------- Includes
  15. //
  16. //
  17. // --------------------------------------------------------------------- Macros
  18. //
  19. //
  20. // These macros read from and write to a field that might not be aligned.
  21. //
  22. #define READ_UNALIGNED16(_Pointer) \
  23. (USHORT)(((PUCHAR)(_Pointer))[0] | (((USHORT)((PUCHAR)(_Pointer))[1]) << 8))
  24. #define WRITE_UNALIGNED16(_Pointer, _Value) \
  25. ((PUCHAR)(_Pointer))[0] = (UCHAR)(_Value), \
  26. ((PUCHAR)(_Pointer))[1] = (UCHAR)((_Value) >> 8)
  27. #define READ_UNALIGNED32(_Pointer) \
  28. (ULONG)(READ_UNALIGNED16(_Pointer) | \
  29. (READ_UNALIGNED16((PUSHORT)(_Pointer) + 1) << 16))
  30. #define WRITE_UNALIGNED32(_Pointer, _Value) \
  31. WRITE_UNALIGNED16(_Pointer, (_Value) & 0xFFFF), \
  32. WRITE_UNALIGNED16((PUSHORT)(_Pointer) + 1), (((_Value) >> 16) & 0xFFFF))
  33. #define READ_UNALIGNED64(_Pointer) \
  34. (ULONGLONG)(READ_UNALIGNED32(_Pointer) | \
  35. (((ULONGLONG)READ_UNALIGNED32((PULONG)(_Pointer) + 1)) << 32))
  36. #define WRITE_UNALIGNED64(_Pointer, _Value) \
  37. WRITE_UNALIGNED32(_Pointer, (_Value) & 0xFFFFFFFF), \
  38. WRITE_UNALIGNED32((PULONG)(_Pointer) + 1, ((_Value) >> 32) & 0xFFFFFFFF)
  39. //
  40. // ---------------------------------------------------------------- Definitions
  41. //
  42. //
  43. // Set the GSI field of an interrupt lines description to this value to
  44. // indicate that this set of lines does not map to any corresponding GSI range.
  45. //
  46. #define INTERRUPT_LINES_GSI_NONE 0xFFFFFFFF
  47. //
  48. // Define the special controller identifier reserved for the CPU itself.
  49. //
  50. #define INTERRUPT_CPU_IDENTIFIER ((UINTN)-1L)
  51. //
  52. // Define the PC CPU interrupt pins.
  53. //
  54. #define INTERRUPT_CPU_LINE_NORMAL_INTERRUPT 0x00000000
  55. #define INTERRUPT_CPU_LINE_NMI 0x00000001
  56. #define INTERRUPT_CPU_LINE_SMI 0x00000002
  57. #define INTERRUPT_CPU_LINE_EXTINT 0x00000003
  58. #define INTERRUPT_PC_MIN_CPU_LINE INTERRUPT_CPU_LINE_NORMAL_INTERRUPT
  59. #define INTERRUPT_PC_MAX_CPU_LINE INTERRUPT_CPU_LINE_EXTINT + 1
  60. //
  61. // Define ARM CPU interrupt pins. Notice how the "normal" interrupt pin is
  62. // always at 0.
  63. //
  64. #define INTERRUPT_CPU_IRQ_PIN 0x00000000
  65. #define INTERRUPT_CPU_FIQ_PIN 0x00000001
  66. #define INTERRUPT_ARM_MIN_CPU_LINE INTERRUPT_CPU_IRQ_PIN
  67. #define INTERRUPT_ARM_MAX_CPU_LINE INTERRUPT_CPU_FIQ_PIN + 1
  68. //
  69. // Define the fixed vectors in the system. The spurious vector must end in 0xF
  70. // as some processors hardwire the lower four bits of the spurious vector
  71. // register.
  72. //
  73. #define VECTOR_SPURIOUS_INTERRUPT 0xFF
  74. #define VECTOR_LOCAL_ERROR 0xFC
  75. //
  76. // Processor description flags.
  77. //
  78. //
  79. // Set this flag if the processor is currently present and available to start.
  80. //
  81. #define PROCESSOR_DESCRIPTION_FLAG_PRESENT 0x00000001
  82. //
  83. // Timer feature flags.
  84. //
  85. //
  86. // Set this flag if the timer's hardware is duplicated across every processor:
  87. // that is, there is an independent timer for each processor.
  88. //
  89. #define TIMER_FEATURE_PER_PROCESSOR 0x00000001
  90. //
  91. // Set this flag if the timer's counter can be read. A readable timer is
  92. // expected to be accessible immediately after it's been initialized, and must
  93. // not generate interrupts or need to generate interrupts to handle rollovers.
  94. // If these conditions cannot be met, do not expose the timer as readable.
  95. //
  96. #define TIMER_FEATURE_READABLE 0x00000002
  97. //
  98. // Set this flag if the timer's counter can be written to. For per-processor
  99. // timers, this is expected to only write to the current processor's counter.
  100. //
  101. #define TIMER_FEATURE_WRITABLE 0x00000004
  102. //
  103. // Set this flag if the timer is capable of generating periodic interrupts.
  104. //
  105. #define TIMER_FEATURE_PERIODIC 0x00000008
  106. //
  107. // Set this flag if the timer is capable of generating one-shot interrupts.
  108. //
  109. #define TIMER_FEATURE_ONE_SHOT 0x00000010
  110. //
  111. // Set this flag if the timer's frequency varies with processor performance
  112. // changes, such as frequency scaling.
  113. //
  114. #define TIMER_FEATURE_P_STATE_VARIANT 0x00000020
  115. //
  116. // Set this flag if the timer stops when the processor is halted.
  117. //
  118. #define TIMER_FEATURE_C_STATE_VARIANT 0x00000040
  119. #define TIMER_FEATURE_VARIANT \
  120. (TIMER_FEATURE_P_STATE_VARIANT | TIMER_FEATURE_C_STATE_VARIANT)
  121. //
  122. // Set this flag only if this timer represents the official processor counter.
  123. // For PC platforms this would be the TSC, for ARM this would be the cycle
  124. // counter.
  125. //
  126. #define TIMER_FEATURE_PROCESSOR_COUNTER 0x00000080
  127. //
  128. // Set this flag if the timer is capable of generating interrupts based on an
  129. // absolute timer value.
  130. //
  131. #define TIMER_FEATURE_ABSOLUTE 0x00000100
  132. //
  133. // Define calendar timer features.
  134. //
  135. //
  136. // Set this flag if calls to write the calendar timer should pass a calendar
  137. // time representation rather than a system time representation.
  138. //
  139. #define CALENDAR_TIMER_FEATURE_WANT_CALENDAR_FORMAT 0x00000001
  140. //
  141. // Set this flag if the calendar timer must be written to at low runlevel. This
  142. // is true for timers that exist over busses like I2C.
  143. //
  144. #define CALENDAR_TIMER_FEATURE_LOW_RUNLEVEL 0x00000002
  145. //
  146. // Interrupt controller feature flags.
  147. //
  148. #define INTERRUPT_FEATURE_LOW_RUN_LEVEL 0x00000001
  149. //
  150. // Interrupt line state flags.
  151. //
  152. //
  153. // Set this flag if the interrupt line should be unmasked.
  154. //
  155. #define INTERRUPT_LINE_STATE_FLAG_ENABLED 0x00000001
  156. //
  157. // Set this flag if the interrupt should be delivered to the processor that
  158. // has the lowest hardware priority level.
  159. //
  160. #define INTERRUPT_LINE_STATE_FLAG_LOWEST_PRIORITY 0x00000002
  161. //
  162. // Set this flag if the interrupt is configured as a wake source.
  163. //
  164. #define INTERRUPT_LINE_STATE_FLAG_WAKE 0x00000004
  165. //
  166. // Set this flag to enable debouncing in the interrupt.
  167. //
  168. #define INTERRUPT_LINE_STATE_FLAG_DEBOUNCE 0x00000008
  169. //
  170. // Define the description table version numbers.
  171. //
  172. #define PROCESSOR_DESCRIPTION_VERSION 1
  173. #define INTERRUPT_LINES_DESCRIPTION_VERSION 1
  174. #define INTERRUPT_CONTROLLER_DESCRIPTION_VERSION 2
  175. #define TIMER_DESCRIPTION_VERSION 1
  176. #define DEBUG_DEVICE_DESCRIPTION_VERSION 1
  177. #define CALENDAR_TIMER_DESCRIPTION_VERSION 2
  178. #define CACHE_CONTROLLER_DESCRIPTION_VERSION 1
  179. //
  180. // Define the cache controller properties version.
  181. //
  182. #define CACHE_CONTROLLER_PROPERTIES_VERSION 1
  183. #define HL_CACHE_FLAG_CLEAN 0x00000001
  184. #define HL_CACHE_FLAG_INVALIDATE 0x00000002
  185. //
  186. // ------------------------------------------------------ Data Type Definitions
  187. //
  188. typedef struct _INTERRUPT_CONTROLLER
  189. INTERRUPT_CONTROLLER, *PINTERRUPT_CONTROLLER;
  190. typedef enum _HARDWARE_MODULE_TYPE {
  191. HardwareModuleInvalid,
  192. HardwareModuleInterruptController,
  193. HardwareModuleInterruptLines,
  194. HardwareModuleTimer,
  195. HardwareModuleDebugDevice,
  196. HardwareModuleCalendarTimer,
  197. HardwareModuleCacheController,
  198. HardwareModuleDebugUsbHostController,
  199. HardwareModuleMaxTypes,
  200. } HARDWARE_MODULE_TYPE, *PHARDWARE_MODULE_TYPE;
  201. typedef enum _TIMER_MODE {
  202. TimerModeInvalid,
  203. TimerModePeriodic,
  204. TimerModeOneShot,
  205. TimerModeAbsolute
  206. } TIMER_MODE, *PTIMER_MODE;
  207. typedef enum _INTERRUPT_MODE {
  208. InterruptModeUnknown,
  209. InterruptModeEdge,
  210. InterruptModeLevel,
  211. } INTERRUPT_MODE, *PINTERRUPT_MODE;
  212. typedef enum _INTERRUPT_ACTIVE_LEVEL {
  213. InterruptActiveLevelUnknown,
  214. InterruptActiveLow,
  215. InterruptActiveHigh,
  216. InterruptActiveBoth
  217. } INTERRUPT_ACTIVE_LEVEL, *PINTERRUPT_ACTIVE_LEVEL;
  218. typedef enum _INTERRUPT_LINE_TYPE {
  219. InterruptLineInvalid,
  220. InterruptLineGsi,
  221. InterruptLineControllerSpecified,
  222. } INTERRUPT_LINE_TYPE, *PINTERRUPT_LINE_TYPE;
  223. typedef enum _INTERRUPT_LINES_TYPE {
  224. InterruptLinesInvalid,
  225. InterruptLinesStandardPin,
  226. InterruptLinesProcessorLocal,
  227. InterruptLinesSoftwareOnly,
  228. InterruptLinesOutput,
  229. } INTERRUPT_LINES_TYPE, *PINTERRUPT_LINES_TYPE;
  230. typedef enum _INTERRUPT_ADDRESSING {
  231. InterruptAddressingInvalid,
  232. InterruptAddressingPhysical,
  233. InterruptAddressingLogicalFlat,
  234. InterruptAddressingLogicalClustered,
  235. InterruptAddressingAll,
  236. InterruptAddressingAllExcludingSelf,
  237. InterruptAddressingSelf
  238. } INTERRUPT_ADDRESSING, *PINTERRUPT_ADDRESSING;
  239. typedef enum _INTERRUPT_CAUSE {
  240. InterruptCauseNoInterruptHere,
  241. InterruptCauseLineFired,
  242. InterruptCauseSpuriousInterrupt
  243. } INTERRUPT_CAUSE, *PINTERRUPT_CAUSE;
  244. /*++
  245. Structure Description:
  246. This structure describes a high level lock. Users should not access or
  247. modify members of this structure directly, as its contents is subject to
  248. change without notice.
  249. Members:
  250. Value - Stores the value of the lock.
  251. WasEnabled - Stores an internal boolean indicating the previous interrupt
  252. state.
  253. --*/
  254. typedef struct _HARDWARE_MODULE_LOCK {
  255. ULONG Value;
  256. BOOL WasEnabled;
  257. } HARDWARE_MODULE_LOCK, *PHARDWARE_MODULE_LOCK;
  258. //
  259. // Interrupt controller structures.
  260. //
  261. /*++
  262. Structure Description:
  263. This structure is used to return information about an interrupt controller.
  264. Members:
  265. Controller - Stores a pointer to the controller itself, a kind of handle.
  266. StartingGsi - Stores the starting global system interrupt number of the
  267. controller.
  268. LineCount - Stores the number of lines in the interrupt controller.
  269. --*/
  270. typedef struct _INTERRUPT_CONTROLLER_INFORMATION {
  271. PINTERRUPT_CONTROLLER Controller;
  272. ULONG StartingGsi;
  273. ULONG LineCount;
  274. } INTERRUPT_CONTROLLER_INFORMATION, *PINTERRUPT_CONTROLLER_INFORMATION;
  275. /*++
  276. Structure Description:
  277. This structure defines an interrupt target as actually supported by the
  278. interrupt controller hardware.
  279. Members:
  280. Addressing - Stores the addressing mode of the interrupt.
  281. PhysicalId - Stores the physical ID of the processor being targeted, if the
  282. addressig mode is physical.
  283. LogicalFlatId - Stores the mask of processors being targeted if the
  284. addressing mode is logical flat.
  285. ClusterId - Stores the cluster identifier if the addressing is logical
  286. clustered.
  287. ClusterMask - Stores the mask of processors within the cluster if the
  288. addressing mode is logical clustered.
  289. --*/
  290. typedef struct _INTERRUPT_HARDWARE_TARGET {
  291. INTERRUPT_ADDRESSING Addressing;
  292. union {
  293. ULONG PhysicalId;
  294. ULONG LogicalFlatId;
  295. struct {
  296. ULONG Id;
  297. ULONG Mask;
  298. } Cluster;
  299. } U;
  300. } INTERRUPT_HARDWARE_TARGET, *PINTERRUPT_HARDWARE_TARGET;
  301. /*++
  302. Structure Description:
  303. This structure describes a processor. It is filled out by the hardware
  304. module to describe a processor to the system.
  305. Members:
  306. Version - Stores the version number of this table as understood by the
  307. hardware module. Set this to PROCESSOR_DESCRIPTION_VERSION.
  308. PhysicalId - Stores the processor identifier number. This number will be
  309. referred to by the system when communicating with the hardware module
  310. about a processor.
  311. LogicalFlatId - Stores the logical flat processor ID to use as a processor
  312. target. Set to 0 if logical flat mode is not supported or not supported
  313. for this processor.
  314. FirmwareIdentifier - Stores the processor identifier number used by the
  315. firmware. This number may or may not be the same as the hardware
  316. identifier.
  317. Flags - Stores a set of flags relating to the processor. See
  318. PROCESSOR_DESCRIPTION_FLAG_* definitions for valid values here.
  319. ParkedPhysicalAddress - Stores the physical address where this core has been
  320. parked.
  321. --*/
  322. typedef struct _PROCESSOR_DESCRIPTION {
  323. ULONG Version;
  324. ULONG PhysicalId;
  325. ULONG LogicalFlatId;
  326. ULONG FirmwareIdentifier;
  327. ULONG Flags;
  328. PHYSICAL_ADDRESS ParkedPhysicalAddress;
  329. } PROCESSOR_DESCRIPTION, *PPROCESSOR_DESCRIPTION;
  330. /*++
  331. Structure Description:
  332. This structure describes a set of one or more interrupt lines.
  333. Members:
  334. Version - Stores the version number of this table as understood by the
  335. hardware module. Set this to INTERRUPT_LINES_DESCRIPTION_VERSION.
  336. Type - Stores the general classification for this set of interrupt lines.
  337. Controller - Stores the controller ID for the controller these lines belong
  338. to.
  339. LineStart - Stores the first line, inclusive, of the line segment being
  340. described.
  341. LineEnd - Stores one beyond the last line (aka exclusive) of the line
  342. segment being described.
  343. Gsi - Stores the GSI base for this range. The GSI number in this member
  344. corresponds to the interrupt line at LineStart. The GSI numbers go up
  345. consecutively through the rest of the segment. Specify
  346. INTERRUPT_LINES_GSI_NONE to indicate that the line segment has no GSI
  347. mapping.
  348. OutputControllerIdentifer - Supplies the identifier of the controller this
  349. line segment refers to. This field is only valid for output line
  350. segments, as the lines refer to the destination controller's source
  351. lines.
  352. --*/
  353. typedef struct _INTERRUPT_LINES_DESCRIPTION {
  354. ULONG Version;
  355. INTERRUPT_LINES_TYPE Type;
  356. UINTN Controller;
  357. LONG LineStart;
  358. LONG LineEnd;
  359. ULONG Gsi;
  360. UINTN OutputControllerIdentifier;
  361. } INTERRUPT_LINES_DESCRIPTION, *PINTERRUPT_LINES_DESCRIPTION;
  362. /*++
  363. Structure Description:
  364. This structure describes an interrupt line.
  365. Members:
  366. Type - Stores the classification method used to identify the interrupt line.
  367. Gsi - Stores the global system interrupt number of the interrupt line. Used
  368. when the classification type is GSI.
  369. Controller - Stores the identifier of the controller on which the line
  370. exists. Used when the classification type is Controller specified.
  371. Line - Stores the line number. Negative numbers may be valid here. Used when
  372. the classification type is Controller specified.
  373. --*/
  374. typedef struct _INTERRUPT_LINE {
  375. INTERRUPT_LINE_TYPE Type;
  376. union {
  377. ULONG Gsi;
  378. struct {
  379. UINTN Controller;
  380. LONG Line;
  381. } Local;
  382. } U;
  383. } INTERRUPT_LINE, *PINTERRUPT_LINE;
  384. /*++
  385. Structure Description:
  386. This structure describes the state of an interrupt line.
  387. Members:
  388. Mode - Stores the interrupt trigger mode of the line.
  389. Polarity - Stores the polarity of the interrupt line.
  390. Flags - Stores a bitfield of flags governing the state of the interrupt
  391. line. See INTERRUPT_LINE_STATE_FLAG_* definitions.
  392. Vector - Stores the vector that this interrupt operates on.
  393. Target - Stores the set of processors to target this interrupt line at.
  394. Output - Stores the output line that this interrupt should output to.
  395. HardwarePriority - Stores a pointer to the hardware priority level this
  396. interrupt should be enabled at.
  397. --*/
  398. typedef struct _INTERRUPT_LINE_STATE {
  399. INTERRUPT_MODE Mode;
  400. INTERRUPT_ACTIVE_LEVEL Polarity;
  401. ULONG Flags;
  402. ULONG Vector;
  403. INTERRUPT_HARDWARE_TARGET Target;
  404. INTERRUPT_LINE Output;
  405. ULONG HardwarePriority;
  406. } INTERRUPT_LINE_STATE, *PINTERRUPT_LINE_STATE;
  407. //
  408. // Timer structures.
  409. //
  410. /*++
  411. Structure Description:
  412. This structure describes a timer's interrupt information.
  413. Members:
  414. Line - Stores which interrupt line the timer fires on.
  415. TriggerMode - Stores the trigger mode. Set to unknown to use the default
  416. mode for the interrupt line.
  417. ActiveLevel - Stores the active line level. Set to unknown to use the
  418. default line level for the interrupt controller.
  419. --*/
  420. typedef struct _TIMER_INTERRUPT {
  421. INTERRUPT_LINE Line;
  422. INTERRUPT_MODE TriggerMode;
  423. INTERRUPT_ACTIVE_LEVEL ActiveLevel;
  424. } TIMER_INTERRUPT, *PTIMER_INTERRUPT;
  425. //
  426. // Calendar time provider functions.
  427. //
  428. /*++
  429. Structure Description:
  430. This structure describes an absolute wall clock time as provided to or
  431. from a calendar time hardware module.
  432. Members:
  433. IsCalendarTime - Stores a boolean indicating if the calendar time is
  434. valid for this structure (TRUE) or the system time (FALSE).
  435. CalendarTime - Stores the calendar time to get or set.
  436. SystemTime - Stores the system time to get or set.
  437. --*/
  438. typedef struct _HARDWARE_MODULE_TIME {
  439. BOOL IsCalendarTime;
  440. union {
  441. CALENDAR_TIME CalendarTime;
  442. SYSTEM_TIME SystemTime;
  443. } U;
  444. } HARDWARE_MODULE_TIME, *PHARDWARE_MODULE_TIME;
  445. /*++
  446. Structure Description:
  447. This structure describes the information for a message signaled interrupt
  448. that is to be retrieved from the hardware layer.
  449. Members:
  450. Address - Stores the physical address to which the MSI/MSI-X data is to be
  451. written when the interrupt is triggered.
  452. Data - Stores the data to write to the physical address when the MSI/MSI-X
  453. interrupt is triggered.
  454. --*/
  455. typedef struct _MSI_INFORMATION {
  456. PHYSICAL_ADDRESS Address;
  457. ULONGLONG Data;
  458. } MSI_INFORMATION, *PMSI_INFORMATION;
  459. //
  460. // Interrupt controller functions.
  461. //
  462. typedef
  463. KSTATUS
  464. (*PINTERRUPT_ENUMERATE_PROCESSORS) (
  465. PVOID Context,
  466. PPROCESSOR_DESCRIPTION Descriptions,
  467. ULONG DescriptionsBufferSize
  468. );
  469. /*++
  470. Routine Description:
  471. This routine describes all processors under the jurisdiction of an interrupt
  472. controller.
  473. Arguments:
  474. Context - Supplies the pointer to the controller's context, provided by the
  475. hardware module upon initialization.
  476. Descriptions - Supplies a pointer to a buffer of an array of processor
  477. descriptions that the hardware module is expected to fill out on
  478. success. The number of entries in the array is the number of processors
  479. reported during the interrupt controller registration.
  480. DescriptionBufferSize - Supplies the size of the buffer passed. The hardware
  481. module should fail the routine if the buffer size is smaller than
  482. expected, but should not fail if the buffer size is larger than
  483. expected.
  484. Return Value:
  485. STATUS_SUCCESS on success. The Descriptions buffer will contain
  486. descriptions of all processors under the jurisdiction of the given
  487. interrupt controller.
  488. Other status codes on failure. The contents of the Descriptions buffer is
  489. undefined.
  490. --*/
  491. typedef
  492. KSTATUS
  493. (*PINTERRUPT_INITIALIZE_LOCAL_UNIT) (
  494. PVOID Context,
  495. PULONG Identifier
  496. );
  497. /*++
  498. Routine Description:
  499. This routine initializes the local unit of an interrupt controller. It is
  500. always called on the processor of the local unit to initialize.
  501. Arguments:
  502. Context - Supplies the pointer to the context of the I/O unit that owns
  503. this processor, provided by the hardware module upon initialization.
  504. Identifier - Supplies a pointer where this function will return the
  505. identifier of the processor being initialized.
  506. Return Value:
  507. STATUS_SUCCESS on success.
  508. Other status codes on failure.
  509. --*/
  510. typedef
  511. KSTATUS
  512. (*PINTERRUPT_INITIALIZE_IO_UNIT) (
  513. PVOID Context
  514. );
  515. /*++
  516. Routine Description:
  517. This routine initializes an interrupt controller. It's responsible for
  518. masking all interrupt lines on the controller and setting the current
  519. priority to the lowest (allow all interrupts). Once completed successfully,
  520. it is expected that interrupts can be enabled at the processor core with
  521. no interrupts occurring.
  522. Arguments:
  523. Context - Supplies the pointer to the controller's context, provided by the
  524. hardware module upon initialization.
  525. Return Value:
  526. STATUS_SUCCESS on success.
  527. Other status codes on failure.
  528. --*/
  529. typedef
  530. KSTATUS
  531. (*PINTERRUPT_SET_LOCAL_UNIT_ADDRESSING) (
  532. PVOID Context,
  533. PINTERRUPT_HARDWARE_TARGET Target
  534. );
  535. /*++
  536. Routine Description:
  537. This routine attempts to set the current processor's addressing mode.
  538. Arguments:
  539. Context - Supplies the pointer to the controller's context, provided by the
  540. hardware module upon initialization.
  541. Target - Supplies a pointer to the targeting configuration to set for this
  542. processor.
  543. Return Value:
  544. STATUS_SUCCESS on success.
  545. STATUS_UNSUCCESSFUL if the operation failed.
  546. STATUS_NOT_SUPPORTED if this configuration is never supported on this
  547. hardware.
  548. --*/
  549. typedef
  550. INTERRUPT_CAUSE
  551. (*PINTERRUPT_BEGIN) (
  552. PVOID Context,
  553. PINTERRUPT_LINE FiringLine,
  554. PULONG MagicCandy
  555. );
  556. /*++
  557. Routine Description:
  558. This routine is called when an interrupt fires. Its role is to determine
  559. if an interrupt has fired on the given controller, accept it, and determine
  560. which line fired if any. This routine will always be called with interrupts
  561. disabled at the processor core.
  562. Arguments:
  563. Context - Supplies the pointer to the controller's context, provided by the
  564. hardware module upon initialization.
  565. FiringLine - Supplies a pointer where the interrupt hardware module will
  566. fill in which line fired, if applicable.
  567. MagicCandy - Supplies a pointer where the interrupt hardware module can
  568. store 32 bits of private information regarding this interrupt. This
  569. information will be returned to it when the End Of Interrupt routine
  570. is called.
  571. Return Value:
  572. Returns an interrupt cause indicating whether or not an interrupt line,
  573. spurious interrupt, or no interrupt fired on this controller.
  574. --*/
  575. typedef
  576. VOID
  577. (*PINTERRUPT_FAST_END_OF_INTERRUPT) (
  578. VOID
  579. );
  580. /*++
  581. Routine Description:
  582. This routine signals to the interrupt controller hardware that servicing
  583. of the highest priority interrupt line has been completed. This routine
  584. will always be called with interrupts disabled at the processor core.
  585. Arguments:
  586. None.
  587. Return Value:
  588. None.
  589. --*/
  590. typedef
  591. VOID
  592. (*PINTERRUPT_END_OF_INTERRUPT) (
  593. PVOID Context,
  594. ULONG MagicCandy
  595. );
  596. /*++
  597. Routine Description:
  598. This routine is called after an interrupt has fired and been serviced. Its
  599. role is to tell the interrupt controller that processing has completed.
  600. This routine will always be called with interrupts disabled at the
  601. processor core.
  602. Arguments:
  603. Context - Supplies the pointer to the controller's context, provided by the
  604. hardware module upon initialization.
  605. MagicCandy - Supplies the magic candy that that the interrupt hardware
  606. module stored when the interrupt began.
  607. Return Value:
  608. None.
  609. --*/
  610. typedef
  611. KSTATUS
  612. (*PINTERRUPT_REQUEST_INTERRUPT) (
  613. PVOID Context,
  614. PINTERRUPT_LINE Line,
  615. ULONG Vector,
  616. PINTERRUPT_HARDWARE_TARGET Target
  617. );
  618. /*++
  619. Routine Description:
  620. This routine requests a hardware interrupt on the given line.
  621. Arguments:
  622. Context - Supplies the pointer to the controller's context, provided by the
  623. hardware module upon initialization.
  624. Line - Supplies a pointer to the interrupt line to spark.
  625. Vector - Supplies the vector to generate the interrupt on (for vectored
  626. architectures only).
  627. Target - Supplies a pointer to the set of processors to target.
  628. Return Value:
  629. STATUS_SUCCESS on success.
  630. Error code on failure.
  631. --*/
  632. typedef
  633. KSTATUS
  634. (*PINTERRUPT_START_PROCESSOR) (
  635. PVOID Context,
  636. ULONG Identifier,
  637. PHYSICAL_ADDRESS JumpAddressPhysical
  638. );
  639. /*++
  640. Routine Description:
  641. This routine sends a "start interrupt" to the given processor.
  642. Arguments:
  643. Context - Supplies the pointer to the controller's context, provided by the
  644. hardware module upon initialization.
  645. Identifier - Supplies the identifier of the processor to start.
  646. JumpAddressPhysical - Supplies the physical address of the location that
  647. new processor should jump to.
  648. Return Value:
  649. STATUS_SUCCESS if the start command was successfully sent.
  650. Error code on failure.
  651. --*/
  652. typedef
  653. KSTATUS
  654. (*PINTERRUPT_SET_LINE_STATE) (
  655. PVOID Context,
  656. PINTERRUPT_LINE Line,
  657. PINTERRUPT_LINE_STATE State,
  658. PVOID ResourceData,
  659. UINTN ResourceDataSize
  660. );
  661. /*++
  662. Routine Description:
  663. This routine enables or disables and configures an interrupt line.
  664. Arguments:
  665. Context - Supplies the pointer to the controller's context, provided by the
  666. hardware module upon initialization.
  667. Line - Supplies a pointer to the line to set up. This will always be a
  668. controller specified line.
  669. State - Supplies a pointer to the new configuration of the line.
  670. ResourceData - Supplies an optional pointer to the device specific resource
  671. data for the interrupt line.
  672. ResourceDataSize - Supplies the size of the resource data, in bytes.
  673. Return Value:
  674. Status code.
  675. --*/
  676. typedef
  677. KSTATUS
  678. (*PINTERRUPT_GET_MESSAGE_INFORMATION) (
  679. ULONGLONG Vector,
  680. ULONGLONG VectorCount,
  681. PINTERRUPT_HARDWARE_TARGET Target,
  682. PINTERRUPT_LINE OutputLine,
  683. ULONG Flags,
  684. PMSI_INFORMATION Information
  685. );
  686. /*++
  687. Routine Description:
  688. This routine gathers the appropriate MSI/MSI-X address and data information
  689. for the given set of contiguous interrupt vectors.
  690. Arguments:
  691. Vector - Supplies the first vector for which information is being requested.
  692. VectorCount - Supplies the number of contiguous vectors for which
  693. information is being requested.
  694. Target - Supplies a pointer to the set of processors to target.
  695. OutputLine - Supplies the output line this interrupt line should interrupt
  696. to.
  697. Flags - Supplies a bitfield of flags about the operation. See
  698. INTERRUPT_LINE_STATE_FLAG_* definitions.
  699. Information - Supplies a pointer to an array of MSI/MSI-X information to
  700. be filled in by the routine.
  701. Return Value:
  702. Status code.
  703. --*/
  704. typedef
  705. VOID
  706. (*PINTERRUPT_MASK_LINE) (
  707. PVOID Context,
  708. PINTERRUPT_LINE Line,
  709. BOOL Enable
  710. );
  711. /*++
  712. Routine Description:
  713. This routine masks or unmasks an interrupt line, leaving the rest of the
  714. line state intact.
  715. Arguments:
  716. Context - Supplies the pointer to the controller's context, provided by the
  717. hardware module upon initialization.
  718. Line - Supplies a pointer to the line to maek or unmask. This will always
  719. be a controller specified line.
  720. Enable - Supplies a boolean indicating whether to mask the interrupt,
  721. preventing interrupts from coming through (FALSE), or enable the line
  722. and allow interrupts to come through (TRUE).
  723. Return Value:
  724. None.
  725. --*/
  726. typedef
  727. KSTATUS
  728. (*PINTERRUPT_SAVE_STATE) (
  729. PVOID Context,
  730. PVOID Buffer
  731. );
  732. /*++
  733. Routine Description:
  734. This routine saves the current state of the interrupt controller, which
  735. may lost momentarily in the hardware due to a power transition. Multiple
  736. save functions may be called in a row. If a transition is abandoned, the
  737. restore function is not called.
  738. Arguments:
  739. Context - Supplies the pointer to the controller's context, provided by the
  740. hardware module upon initialization.
  741. Buffer - Supplies a pointer to the save buffer for this processor, the
  742. size of which was reported during registration.
  743. Return Value:
  744. Status code.
  745. --*/
  746. typedef
  747. KSTATUS
  748. (*PINTERRUPT_RESTORE_STATE) (
  749. PVOID Context,
  750. PVOID Buffer
  751. );
  752. /*++
  753. Routine Description:
  754. This routine restores the previous state of the interrupt controller.
  755. Arguments:
  756. Context - Supplies the pointer to the controller's context, provided by the
  757. hardware module upon initialization.
  758. Buffer - Supplies a pointer to the save buffer for this processor, the
  759. size of which was reported during registration.
  760. Return Value:
  761. Status code.
  762. --*/
  763. /*++
  764. Structure Description:
  765. This structure describes the API of a hardware module. It is passed by the
  766. hardware module to the kernel during registration to supply pointers to the
  767. hardware module's functionality.
  768. Members:
  769. InitializeIoUnit - Stores a pointer to a function that initializes
  770. an interrupt controller.
  771. SetLineState - Stores a pointer to a fucntion that configures an interrupt
  772. line.
  773. MaskLine - Stores a pointer to a function used to mask and unmask
  774. interrupt lines (without altering the remaining line state).
  775. BeginInterrupt - Stores a pointer to a function that is called when an
  776. interrupt fires.
  777. FastEndOfInterrupt - Stores a pointer to a function that sends an End Of
  778. Interrupt command to the interrupt controller, signaling the end of
  779. servicing the highest priority line in service. The only difference
  780. between this routine and the normal end of interrupt routine is that
  781. this one takes no parameters. If this routine is supplied, it will
  782. always be used instead of the normal end of interrupt routine.
  783. EndOfInterrupt - Stores a pointer to a function that sends an End Of
  784. Interrupt command to the interrupt controller, singaling the end of
  785. servicing the highest priority line in service.
  786. RequestInterrupt - Stores a pointer to a function that requests a hardware
  787. interrupt on the given line.
  788. EnumerateProcessors - Stores a pointer to a function that describes a set of
  789. processors to the system.
  790. InitializeLocalUnit - Stores a pointer to a function that initializes the
  791. processor-local portion of an interrupt controller. This routine is
  792. called once on each processor during boot and after descructive idle
  793. states.
  794. SetLocalUnitAddressing - Stores a pointer to a function that sets the
  795. destination addressing mode for the current processor.
  796. StartProcessor - Stores a pointer to a function that starts another
  797. processor.
  798. GetMessageInformation - Stores a pointer to a function used to get MSI
  799. message address and data pairs, for controllers that support Message
  800. Signaled Interrupts.
  801. SaveState - Stores a pointer to a function used to save the interrupt
  802. controller state in preparation for a context loss (power transition).
  803. RestoreState - Stores a pointer to a function used to restore previously
  804. saved interrupt controller state after a power transition.
  805. --*/
  806. typedef struct _INTERRUPT_FUNCTION_TABLE {
  807. PINTERRUPT_INITIALIZE_IO_UNIT InitializeIoUnit;
  808. PINTERRUPT_SET_LINE_STATE SetLineState;
  809. PINTERRUPT_MASK_LINE MaskLine;
  810. PINTERRUPT_BEGIN BeginInterrupt;
  811. PINTERRUPT_FAST_END_OF_INTERRUPT FastEndOfInterrupt;
  812. PINTERRUPT_END_OF_INTERRUPT EndOfInterrupt;
  813. PINTERRUPT_REQUEST_INTERRUPT RequestInterrupt;
  814. PINTERRUPT_ENUMERATE_PROCESSORS EnumerateProcessors;
  815. PINTERRUPT_INITIALIZE_LOCAL_UNIT InitializeLocalUnit;
  816. PINTERRUPT_SET_LOCAL_UNIT_ADDRESSING SetLocalUnitAddressing;
  817. PINTERRUPT_START_PROCESSOR StartProcessor;
  818. PINTERRUPT_GET_MESSAGE_INFORMATION GetMessageInformation;
  819. PINTERRUPT_SAVE_STATE SaveState;
  820. PINTERRUPT_RESTORE_STATE RestoreState;
  821. } INTERRUPT_FUNCTION_TABLE, *PINTERRUPT_FUNCTION_TABLE;
  822. //
  823. // Timer functions.
  824. //
  825. typedef
  826. KSTATUS
  827. (*PTIMER_INITIALIZE) (
  828. PVOID Context
  829. );
  830. /*++
  831. Routine Description:
  832. This routine initializes a timer and puts it into a known state. Once
  833. initialized, the timer should not be generating interrupts. If it has a
  834. readable counter, the counter should be counting after the initialize call
  835. has returned. This routine will be called once on boot and after any idle
  836. state transition that is destructive to the timer.
  837. Arguments:
  838. Context - Supplies the pointer to the timer's context, provided by the
  839. hardware module upon initialization.
  840. Return Value:
  841. STATUS_SUCCESS on success.
  842. Other status codes on failure. The timer will not be used if a failure
  843. status code is returned.
  844. --*/
  845. typedef
  846. ULONGLONG
  847. (*PTIMER_READ_COUNTER) (
  848. PVOID Context
  849. );
  850. /*++
  851. Routine Description:
  852. This routine returns the hardware counter's raw value. All unimplemented
  853. bits should be set to 0. This routine will only be called for timers that
  854. have set the readable counter feature bit. The system assumes that all
  855. timers count up. If the hardware actually counts down, the implementation
  856. of this routine should do a subtraction from the maximum value to make it
  857. appear as though the timer counts up.
  858. Arguments:
  859. Context - Supplies the pointer to the timer's context, provided by the
  860. hardware module upon initialization.
  861. Return Value:
  862. Returns the timer's current count.
  863. --*/
  864. typedef
  865. VOID
  866. (*PTIMER_WRITE_COUNTER) (
  867. PVOID Context,
  868. ULONGLONG NewCount
  869. );
  870. /*++
  871. Routine Description:
  872. This routine writes to the timer's hardware counter. This routine will
  873. only be called for timers that have the writable counter feature bit set.
  874. Arguments:
  875. Context - Supplies the pointer to the timer's context, provided by the
  876. hardware module upon initialization.
  877. NewCount - Supplies the value to write into the counter. It is expected that
  878. the counter will not stop after the write.
  879. Return Value:
  880. None.
  881. --*/
  882. typedef
  883. KSTATUS
  884. (*PTIMER_ARM) (
  885. PVOID Context,
  886. TIMER_MODE Mode,
  887. ULONGLONG TickCount
  888. );
  889. /*++
  890. Routine Description:
  891. This routine arms the timer to fire an interrupt after the specified number
  892. of ticks. It is expected that arming the timer may alter the timeline of
  893. the counter.
  894. Arguments:
  895. Context - Supplies the pointer to the timer's context, provided by the
  896. hardware module upon initialization.
  897. Mode - Supplies the mode to arm the timer in. The system will never request
  898. a mode not supported by the timer's feature bits. The mode dictates
  899. how the tick count argument is interpreted.
  900. TickCount - Supplies the interval, in ticks, from now for the timer to fire
  901. in.
  902. Return Value:
  903. STATUS_SUCCESS on success.
  904. Other error codes on failure. The timer will be considered in a failed
  905. state and will no longer be used if a failure code is returned here.
  906. --*/
  907. typedef
  908. VOID
  909. (*PTIMER_DISARM) (
  910. PVOID Context
  911. );
  912. /*++
  913. Routine Description:
  914. This routine disarms the timer, stopping interrupts from firing.
  915. Arguments:
  916. Context - Supplies the pointer to the timer's context, provided by the
  917. hardware module upon initialization.
  918. Return Value:
  919. None.
  920. --*/
  921. typedef
  922. VOID
  923. (*PTIMER_ACKNOWLEDGE_INTERRUPT) (
  924. PVOID Context
  925. );
  926. /*++
  927. Routine Description:
  928. This routine performs any actions necessary upon reciept of a timer's
  929. interrupt. This may involve writing to an acknowledge register to re-enable
  930. the timer to fire again, or other hardware specific actions.
  931. Arguments:
  932. Context - Supplies the pointer to the timer's context, provided by the
  933. hardware module upon initialization.
  934. Return Value:
  935. None.
  936. --*/
  937. /*++
  938. Structure Description:
  939. This structure describes the API of a timer module. It is passed by the
  940. hardware module to the kernel during registration to supply pointers to the
  941. hardware module's functionality.
  942. Members:
  943. Initialize - Stores a pointer to a function that initializes a timer,
  944. making it non-interrupting and getting the counter ticking.
  945. ReadCounter - Stores a pointer to a function that reads the current count
  946. from the timer.
  947. WriteCounter - Stores a pointer to a function that writes a new count to
  948. the timer.
  949. Arm - Stores a pointer to a function that arms the timer to fire an
  950. interrupt at a given number of ticks from now.
  951. AcknowledgeInterrupt - Stores an optional pointer to a function that
  952. performs hardware specific actions in response to an interrupt.
  953. --*/
  954. typedef struct _TIMER_FUNCTION_TABLE {
  955. PTIMER_INITIALIZE Initialize;
  956. PTIMER_READ_COUNTER ReadCounter;
  957. PTIMER_WRITE_COUNTER WriteCounter;
  958. PTIMER_ARM Arm;
  959. PTIMER_DISARM Disarm;
  960. PTIMER_ACKNOWLEDGE_INTERRUPT AcknowledgeInterrupt;
  961. } TIMER_FUNCTION_TABLE, *PTIMER_FUNCTION_TABLE;
  962. //
  963. // Debug device functions.
  964. //
  965. typedef
  966. KSTATUS
  967. (*PDEBUG_DEVICE_RESET) (
  968. PVOID Context,
  969. ULONG BaudRate
  970. );
  971. /*++
  972. Routine Description:
  973. This routine initializes and resets a debug device, preparing it to send
  974. and receive data.
  975. Arguments:
  976. Context - Supplies the pointer to the port's context, provided by the
  977. hardware module upon initialization.
  978. BaudRate - Supplies the baud rate to set.
  979. Return Value:
  980. STATUS_SUCCESS on success.
  981. Other status codes on failure. The device will not be used if a failure
  982. status code is returned.
  983. --*/
  984. typedef
  985. KSTATUS
  986. (*PDEBUG_DEVICE_TRANSMIT) (
  987. PVOID Context,
  988. PVOID Data,
  989. ULONG Size
  990. );
  991. /*++
  992. Routine Description:
  993. This routine transmits data from the host out through the debug device.
  994. Arguments:
  995. Context - Supplies the pointer to the port's context, provided by the
  996. hardware module upon initialization.
  997. Data - Supplies a pointer to the data to write.
  998. Size - Supplies the size to write, in bytes.
  999. Return Value:
  1000. STATUS_SUCCESS on success.
  1001. STATUS_DEVICE_IO_ERROR if a device error occurred.
  1002. --*/
  1003. typedef
  1004. KSTATUS
  1005. (*PDEBUG_DEVICE_RECEIVE) (
  1006. PVOID Context,
  1007. PVOID Data,
  1008. PULONG Size
  1009. );
  1010. /*++
  1011. Routine Description:
  1012. This routine receives incoming data from the debug device. If no data is
  1013. available, this routine should return immediately. If only some of the
  1014. requested data is available, this routine should return the data that can
  1015. be obtained now and return.
  1016. Arguments:
  1017. Context - Supplies the pointer to the port's context, provided by the
  1018. hardware module upon initialization.
  1019. Data - Supplies a pointer where the read data will be returned on success.
  1020. Size - Supplies a pointer that on input contains the size of the receive
  1021. buffer. On output, returns the number of bytes read.
  1022. Return Value:
  1023. STATUS_SUCCESS on success.
  1024. STATUS_NO_DATA_AVAILABLE if there was no data to be read at the current
  1025. time.
  1026. STATUS_DEVICE_IO_ERROR if a device error occurred.
  1027. --*/
  1028. typedef
  1029. KSTATUS
  1030. (*PDEBUG_DEVICE_GET_STATUS) (
  1031. PVOID Context,
  1032. PBOOL ReceiveDataAvailable
  1033. );
  1034. /*++
  1035. Routine Description:
  1036. This routine returns the current device status.
  1037. Arguments:
  1038. Context - Supplies the pointer to the port's context, provided by the
  1039. hardware module upon initialization.
  1040. ReceiveDataAvailable - Supplies a pointer where a boolean will be returned
  1041. indicating whether or not receive data is available.
  1042. Return Value:
  1043. Status code.
  1044. --*/
  1045. typedef
  1046. VOID
  1047. (*PDEBUG_DEVICE_DISCONNECT) (
  1048. PVOID Context
  1049. );
  1050. /*++
  1051. Routine Description:
  1052. This routine disconnects a device, taking it offline.
  1053. Arguments:
  1054. Context - Supplies the pointer to the port's context, provided by the
  1055. hardware module upon initialization.
  1056. Return Value:
  1057. None.
  1058. --*/
  1059. /*++
  1060. Structure Description:
  1061. This structure describes the API of a debug device.
  1062. Members:
  1063. Reset - Stores a pointer to a function used to reset and initialize the
  1064. device.
  1065. Transmit - Stores a pointer to a function used to transmit data out from
  1066. the debug device.
  1067. Receive - Stores a pointer to a function used to receive data from the
  1068. debug device.
  1069. GetStatus - Stores a pointer to a function used to get the status of the
  1070. device.
  1071. Disconnect - Stores a pointer to a function called when the debug
  1072. connection is being dropped. If it is re-established, Reset will be
  1073. called.
  1074. --*/
  1075. typedef struct _DEBUG_DEVICE_FUNCTION_TABLE {
  1076. PDEBUG_DEVICE_RESET Reset;
  1077. PDEBUG_DEVICE_TRANSMIT Transmit;
  1078. PDEBUG_DEVICE_RECEIVE Receive;
  1079. PDEBUG_DEVICE_GET_STATUS GetStatus;
  1080. PDEBUG_DEVICE_DISCONNECT Disconnect;
  1081. } DEBUG_DEVICE_FUNCTION_TABLE, *PDEBUG_DEVICE_FUNCTION_TABLE;
  1082. //
  1083. // Calendar time functions.
  1084. //
  1085. typedef
  1086. KSTATUS
  1087. (*PCALENDAR_TIMER_INITIALIZE) (
  1088. PVOID Context
  1089. );
  1090. /*++
  1091. Routine Description:
  1092. This routine initializes a calendar timer so that it may be ready for
  1093. read and write calls.
  1094. Arguments:
  1095. Context - Supplies the pointer to the timer's context, provided by the
  1096. hardware module upon initialization.
  1097. Return Value:
  1098. STATUS_SUCCESS on success.
  1099. Other status codes on failure. The timer will not be used if a failure
  1100. status code is returned.
  1101. --*/
  1102. typedef
  1103. KSTATUS
  1104. (*PCALENDAR_TIMER_READ) (
  1105. PVOID Context,
  1106. PHARDWARE_MODULE_TIME CurrentTime
  1107. );
  1108. /*++
  1109. Routine Description:
  1110. This routine returns the calendar timer's current value.
  1111. Arguments:
  1112. Context - Supplies the pointer to the timer's context, provided by the
  1113. hardware module upon initialization.
  1114. CurrentTime - Supplies a pointer where the read current time will be
  1115. returned.
  1116. Return Value:
  1117. STATUS_SUCCESS on success.
  1118. Other status codes on failure.
  1119. --*/
  1120. typedef
  1121. KSTATUS
  1122. (*PCALENDAR_TIMER_WRITE) (
  1123. PVOID Context,
  1124. PHARDWARE_MODULE_TIME NewTime
  1125. );
  1126. /*++
  1127. Routine Description:
  1128. This routine writes to the calendar timer.
  1129. Arguments:
  1130. Context - Supplies the pointer to the timer's context, provided by the
  1131. hardware module upon initialization.
  1132. NewTime - Supplies a pointer to the new time to set. The hardware module
  1133. should set this as quickly as possible. The system will supply either
  1134. a calendar time or a system time in here based on which type the timer
  1135. requested at registration.
  1136. Return Value:
  1137. STATUS_SUCCESS on success.
  1138. Other status codes on failure.
  1139. --*/
  1140. /*++
  1141. Structure Description:
  1142. This structure describes the API of a calendar timer hardware module. It is
  1143. passed by the hardware module to the kernel during registration to supply
  1144. pointers to the hardware module's functionality.
  1145. Members:
  1146. Initialize - Stores a pointer to a function used to initialize the unit.
  1147. Read - Stores a pointer to a function that returns the current calendar
  1148. time from the timer.
  1149. Write - Stores a pointer to a function that sets the current calendar time
  1150. in the timer.
  1151. --*/
  1152. typedef struct _CALENDAR_TIMER_FUNCTION_TABLE {
  1153. PCALENDAR_TIMER_INITIALIZE Initialize;
  1154. PCALENDAR_TIMER_READ Read;
  1155. PCALENDAR_TIMER_WRITE Write;
  1156. } CALENDAR_TIMER_FUNCTION_TABLE, *PCALENDAR_TIMER_FUNCTION_TABLE;
  1157. //
  1158. // Cache controller structures.
  1159. //
  1160. /*++
  1161. Structure Description:
  1162. This structure describes the properties of a cache controller.
  1163. Members:
  1164. Version - Stores the version of the cache controller properties structure.
  1165. The system will set this to the version number it is expecting when
  1166. querying properties. The hardware module should fail if it does not
  1167. support the requested version (e.g. a version greater than its version).
  1168. DataCacheLineSize - Stores the size of a data cache line in bytes.
  1169. InstructionCacheLineSize - Stores the size of an instruction cache line in
  1170. bytes.
  1171. CacheSize - Stores the size of the cache in bytes.
  1172. --*/
  1173. typedef struct _CACHE_CONTROLLER_PROPERTIES {
  1174. ULONG Version;
  1175. ULONG DataCacheLineSize;
  1176. ULONG InstructionCacheLineSize;
  1177. ULONG CacheSize;
  1178. } CACHE_CONTROLLER_PROPERTIES, *PCACHE_CONTROLLER_PROPERTIES;
  1179. //
  1180. // Cache controller functions.
  1181. //
  1182. typedef
  1183. KSTATUS
  1184. (*PCACHE_CONTROLLER_INITIALIZE) (
  1185. PVOID Context
  1186. );
  1187. /*++
  1188. Routine Description:
  1189. This routine initializes a cache controller to enable the cache and prepare
  1190. it for clean and invalidate calls.
  1191. Arguments:
  1192. Context - Supplies the pointer to the cache controller's context, provided
  1193. by the hardware module upon initialization.
  1194. Return Value:
  1195. STATUS_SUCCESS on success.
  1196. Other status codes on failure. The cache controller will not be used if a
  1197. failure status code is returned.
  1198. --*/
  1199. typedef
  1200. VOID
  1201. (*PCACHE_CONTROLLER_FLUSH) (
  1202. PVOID Context,
  1203. ULONG Flags
  1204. );
  1205. /*++
  1206. Routine Description:
  1207. This routine cleans and/or invalidates the cache owned by the cache
  1208. controller.
  1209. Arguments:
  1210. Context - Supplies the pointer to the cache controller's context, provided
  1211. by the hardware module upon initialization.
  1212. Flags - Supplies a bitmask of flush flags. See CACHE_CONTROLLER_FLUSH_FLAG_*
  1213. for definitions.
  1214. Return Value:
  1215. None.
  1216. --*/
  1217. typedef
  1218. VOID
  1219. (*PCACHE_CONTROLLER_FLUSH_REGION) (
  1220. PVOID Context,
  1221. PHYSICAL_ADDRESS Address,
  1222. UINTN SizeInBytes,
  1223. ULONG Flags
  1224. );
  1225. /*++
  1226. Routine Description:
  1227. This routine cleans and/or invalidates a region of the cache owned by the
  1228. cache controller.
  1229. Arguments:
  1230. Context - Supplies the pointer to the cache controller's context, provided
  1231. by the hardware module upon initialization.
  1232. Address - Supplies the starting physical address of the region to flush. It
  1233. must be aligned to the cache line size.
  1234. SizeInBytes - Supplies the number of bytes to flush.
  1235. Flags - Supplies a bitmask of flush flags. See CACHE_CONTROLLER_FLUSH_FLAG_*
  1236. for definitions.
  1237. Return Value:
  1238. None.
  1239. --*/
  1240. typedef
  1241. KSTATUS
  1242. (*PCACHE_CONTROLLER_GET_PROPERTIES) (
  1243. PVOID Context,
  1244. PCACHE_CONTROLLER_PROPERTIES Properties
  1245. );
  1246. /*++
  1247. Routine Description:
  1248. This routine cleans and invalidates the cache owned by the cache controller.
  1249. Arguments:
  1250. Context - Supplies the pointer to the cache controller's context, provided
  1251. by the hardware module upon initialization.
  1252. Properties - Supplies a pointer that receives the properties of the given
  1253. cache controller (e.g. cache line size).
  1254. Return Value:
  1255. STATUS_SUCCESS on success.
  1256. Other status codes on failure.
  1257. --*/
  1258. /*++
  1259. Structure Description:
  1260. This structure describes the API of a cache controller hardware module. It
  1261. is passed by the hardware module to the kernel during registration to
  1262. supply pointers to the hardware module's functionality.
  1263. Members:
  1264. Initialize - Stores a pointer to a function used to initialize the unit.
  1265. --*/
  1266. typedef struct _CACHE_CONTROLLER_FUNCTION_TABLE {
  1267. PCACHE_CONTROLLER_INITIALIZE Initialize;
  1268. PCACHE_CONTROLLER_FLUSH Flush;
  1269. PCACHE_CONTROLLER_FLUSH_REGION FlushRegion;
  1270. PCACHE_CONTROLLER_GET_PROPERTIES GetProperties;
  1271. } CACHE_CONTROLLER_FUNCTION_TABLE, *PCACHE_CONTROLLER_FUNCTION_TABLE;
  1272. //
  1273. // Registration structures.
  1274. //
  1275. /*++
  1276. Structure Description:
  1277. This structure is used to describe an interrupt controller to the system.
  1278. It is passed from the hardware module to the kernel.
  1279. Members:
  1280. TableVersion - Stores the version of the interrupt controller description
  1281. table as understood by the hardware module. Set this to
  1282. INTERRUPT_CONTROLLER_DESCRIPTION_VERSION.
  1283. FunctionTable - Stores the table of pointers to the hardware module's
  1284. functions.
  1285. Context - Stores a pointer's worth of data specific to this interrupt
  1286. controller instance. This pointer will be passed back to the hardware
  1287. module on each call.
  1288. Flags - Stores a bitfield of flags regarding this interrupt controller.
  1289. See INTERRUPT_FEATURE_* flags.
  1290. Identifier - Stores the unique identifier of the interrupt controller.
  1291. This is expected to be unique across all interrupt controllers in the
  1292. system.
  1293. ProcessorCount - Stores the number of processors under the jurisdiction of
  1294. this interrupt controller.
  1295. PriorityCount - Stores the number of hardware priority levels that
  1296. interrupts can be configured at. This value may be 0 to indicate that
  1297. the controller does not support a hardware priority scheme.
  1298. SaveContextSize - Stores the number of bytes needed per processor to save
  1299. the interrupt controller state.
  1300. --*/
  1301. typedef struct _INTERRUPT_CONTROLLER_DESCRIPTION {
  1302. ULONG TableVersion;
  1303. INTERRUPT_FUNCTION_TABLE FunctionTable;
  1304. PVOID Context;
  1305. ULONG Flags;
  1306. UINTN Identifier;
  1307. ULONG ProcessorCount;
  1308. ULONG PriorityCount;
  1309. ULONG SaveContextSize;
  1310. } INTERRUPT_CONTROLLER_DESCRIPTION, *PINTERRUPT_CONTROLLER_DESCRIPTION;
  1311. /*++
  1312. Structure Description:
  1313. This structure is used to describe a timer to the system. It is passed from
  1314. the hardware module to the kernel.
  1315. Members:
  1316. TableVersion - Stores the version of the timer description table as
  1317. understood by the hardware module. Set this to
  1318. TIMER_DESCRIPTION_VERSION.
  1319. FunctionTable - Stores the table of pointers to the hardware module's
  1320. functions.
  1321. Context - Stores a pointer's worth of data specific to this timer instance.
  1322. This pointer will be passed back to the hardware module on each call.
  1323. Identifier - Stores the unique identifier of the timer.
  1324. Features - Stores a bitfield of the timer's features. See TIMER_FEATURE_*
  1325. definitions.
  1326. CounterFrequency - Stores the frequency of the counter, in Hertz. This is
  1327. required even if the counter is not exposed as readable, as it is used
  1328. in calculations for arming tick counts. If the counter's frequency is
  1329. not known, supply 0, and the system will measure the counter's frequency
  1330. using another timer.
  1331. CounterBitWidth - Stores the number of bits in the counter.
  1332. Interrupt - Stores information about how the timer's interrupt is routed
  1333. and configured.
  1334. --*/
  1335. typedef struct _TIMER_DESCRIPTION {
  1336. ULONG TableVersion;
  1337. TIMER_FUNCTION_TABLE FunctionTable;
  1338. PVOID Context;
  1339. ULONG Identifier;
  1340. ULONG Features;
  1341. ULONGLONG CounterFrequency;
  1342. ULONG CounterBitWidth;
  1343. TIMER_INTERRUPT Interrupt;
  1344. } TIMER_DESCRIPTION, *PTIMER_DESCRIPTION;
  1345. /*++
  1346. Structure Description:
  1347. This structure is used to describe a debug device to the system. It is
  1348. passed from the hardware module to the kernel.
  1349. Members:
  1350. TableVersion - Stores the version of the debug device description table as
  1351. understood by the hardware module. Set this to
  1352. DEBUG_DEVICE_DESCRIPTION_VERSION.
  1353. FunctionTable - Stores the table of pointers to the hardware module's
  1354. functions.
  1355. Context - Stores a pointer's worth of data specific to this serial instance.
  1356. This pointer will be passed back to the hardware module on each call.
  1357. PortType - Stores the port type of the debug device as defined by the
  1358. debug port table 2 specification.
  1359. PortSubType - Stores the port subtype of the debug device as defined by the
  1360. debug port table 2 specification.
  1361. Identifier - Stores the unique identifier of the device, often its physical
  1362. base address.
  1363. --*/
  1364. typedef struct _DEBUG_DEVICE_DESCRIPTION {
  1365. ULONG TableVersion;
  1366. DEBUG_DEVICE_FUNCTION_TABLE FunctionTable;
  1367. PVOID Context;
  1368. USHORT PortType;
  1369. USHORT PortSubType;
  1370. ULONGLONG Identifier;
  1371. } DEBUG_DEVICE_DESCRIPTION, *PDEBUG_DEVICE_DESCRIPTION;
  1372. /*++
  1373. Structure Description:
  1374. This structure is used to describe a calendar timer to the system. It is
  1375. passed from the hardware module to the kernel.
  1376. Members:
  1377. TableVersion - Stores the version of the calendar timer description
  1378. table as understood by the hardware module. Set this to
  1379. CALENDAR_TIMER_DESCRIPTION_VERSION.
  1380. FunctionTable - Stores the table of pointers to the hardware module's
  1381. functions.
  1382. Context - Stores a pointer's worth of data specific to this calendar timer
  1383. instance. This pointer will be passed back to the hardware module on
  1384. each call.
  1385. Identifier - Stores the unique identifier of the calendar timer.
  1386. Features - Stores a bitfield of features about the timer. See
  1387. CALENDAR_TIMER_FEATURE_* definitions.
  1388. --*/
  1389. typedef struct _CALENDAR_TIMER_DESCRIPTION {
  1390. ULONG TableVersion;
  1391. CALENDAR_TIMER_FUNCTION_TABLE FunctionTable;
  1392. PVOID Context;
  1393. ULONG Identifier;
  1394. ULONG Features;
  1395. } CALENDAR_TIMER_DESCRIPTION, *PCALENDAR_TIMER_DESCRIPTION;
  1396. /*++
  1397. Structure Description:
  1398. This structure is used to describe a cache controller timer to the system.
  1399. It is passed from the hardware module to the kernel.
  1400. Members:
  1401. TableVersion - Stores the version of the cache controller description table
  1402. as understood by the hardware module. Set this to
  1403. CACHE_CONTROLLER_DESCRIPTION_VERSION.
  1404. FunctionTable - Stores the table of pointers to the hardware module's
  1405. functions.
  1406. Context - Stores a pointer's worth of data specific to this cache
  1407. controller instance. This pointer will be passed back to the hardware
  1408. module on each call.
  1409. Identifier - Stores the unique identifier of the cache controller.
  1410. PropertiesVersion - Stores the version of the cache controller properties
  1411. as understood by the hardware module. Set this to
  1412. CACHE_CONTROLLER_PROPERTIES_VERSION.
  1413. --*/
  1414. typedef struct _CACHE_CONTROLLER_DESCRIPTION {
  1415. ULONG TableVersion;
  1416. CACHE_CONTROLLER_FUNCTION_TABLE FunctionTable;
  1417. PVOID Context;
  1418. ULONG Identifier;
  1419. ULONG PropertiesVersion;
  1420. } CACHE_CONTROLLER_DESCRIPTION, *PCACHE_CONTROLLER_DESCRIPTION;
  1421. //
  1422. // Hardware module prototypes.
  1423. //
  1424. typedef
  1425. PVOID
  1426. (*PHARDWARE_MODULE_GET_ACPI_TABLE) (
  1427. ULONG Signature,
  1428. PVOID PreviousTable
  1429. );
  1430. /*++
  1431. Routine Description:
  1432. This routine attempts to find an ACPI description table with the given
  1433. signature.
  1434. Arguments:
  1435. Signature - Supplies the signature of the desired table.
  1436. PreviousTable - Supplies a pointer to the table to start the search from.
  1437. Return Value:
  1438. Returns a pointer to the beginning of the header to the table if the table
  1439. was found, or NULL if the table could not be located.
  1440. --*/
  1441. typedef
  1442. VOID
  1443. (*PHARDWARE_MODULE_ENTRY) (
  1444. VOID
  1445. );
  1446. /*++
  1447. Routine Description:
  1448. This routine is the entry point for a hardware module. Its role is to
  1449. detect the prescense of any of the hardware modules it contains
  1450. implementations for and instantiate them with the kernel.
  1451. Arguments:
  1452. None.
  1453. Return Value:
  1454. None.
  1455. --*/
  1456. //
  1457. // -------------------------------------------------------------------- Globals
  1458. //
  1459. //
  1460. // -------------------------------------------------------- Function Prototypes
  1461. //
  1462. KERNEL_API
  1463. KSTATUS
  1464. HlRegisterHardware (
  1465. HARDWARE_MODULE_TYPE Type,
  1466. PVOID Description
  1467. );
  1468. /*++
  1469. Routine Description:
  1470. This routine registers a hardware module with the system.
  1471. Arguments:
  1472. Type - Supplies the type of resource being registered.
  1473. Description - Supplies a description of the resource being registered.
  1474. Return Value:
  1475. Returns a pointer to the allocation of the requested size on success.
  1476. NULL on failure.
  1477. --*/
  1478. KERNEL_API
  1479. PVOID
  1480. HlGetAcpiTable (
  1481. ULONG Signature,
  1482. PVOID PreviousTable
  1483. );
  1484. /*++
  1485. Routine Description:
  1486. This routine attempts to find an ACPI description table with the given
  1487. signature.
  1488. Arguments:
  1489. Signature - Supplies the signature of the desired table.
  1490. PreviousTable - Supplies a pointer to the table to start the search from.
  1491. Return Value:
  1492. Returns a pointer to the beginning of the header to the table if the table
  1493. was found, or NULL if the table could not be located.
  1494. --*/
  1495. KERNEL_API
  1496. PVOID
  1497. HlAllocateMemory (
  1498. UINTN Size,
  1499. ULONG Tag,
  1500. BOOL Device,
  1501. PPHYSICAL_ADDRESS PhysicalAddress
  1502. );
  1503. /*++
  1504. Routine Description:
  1505. This routine allocates memory from the non-paged pool. This memory will
  1506. never be paged out and can be accessed at any level.
  1507. Arguments:
  1508. Size - Supplies the size of the allocation, in bytes.
  1509. Tag - Supplies an identifier to associate with the allocation, useful for
  1510. debugging and leak detection.
  1511. Device - Supplies a boolean indicating if this memory will be accessed by
  1512. a device directly. If TRUE, the memory will be mapped uncached.
  1513. PhysicalAddress - Supplies an optional pointer where the physical address
  1514. of the allocation is returned.
  1515. Return Value:
  1516. Returns the allocated memory if successful, or NULL on failure.
  1517. --*/
  1518. KERNEL_API
  1519. PVOID
  1520. HlMapPhysicalAddress (
  1521. PHYSICAL_ADDRESS PhysicalAddress,
  1522. ULONG SizeInBytes,
  1523. BOOL CacheDisabled
  1524. );
  1525. /*++
  1526. Routine Description:
  1527. This routine maps a physical address into kernel VA space. It is meant so
  1528. that system components can access memory mapped hardware.
  1529. Arguments:
  1530. PhysicalAddress - Supplies a pointer to the physical address. This address
  1531. must be page aligned.
  1532. SizeInBytes - Supplies the size in bytes of the mapping. This will be
  1533. rounded up to the nearest page size.
  1534. CacheDisabled - Supplies a boolean indicating if the memory is to be mapped
  1535. uncached.
  1536. Return Value:
  1537. Returns a pointer to the virtual address of the mapping on success, or
  1538. NULL on failure.
  1539. --*/
  1540. KERNEL_API
  1541. VOID
  1542. HlUnmapAddress (
  1543. PVOID VirtualAddress,
  1544. ULONG SizeInBytes
  1545. );
  1546. /*++
  1547. Routine Description:
  1548. This routine unmaps memory mapped with MmMapPhysicalMemory.
  1549. Arguments:
  1550. VirtualAddress - Supplies the virtual address to unmap.
  1551. SizeInBytes - Supplies the number of bytes to unmap.
  1552. Return Value:
  1553. None.
  1554. --*/
  1555. KERNEL_API
  1556. VOID
  1557. HlReportPhysicalAddressUsage (
  1558. PHYSICAL_ADDRESS PhysicalAddress,
  1559. ULONGLONG Size
  1560. );
  1561. /*++
  1562. Routine Description:
  1563. This routine is called by a hardware module plugin to notify the system
  1564. about a range of physical address space that is in use by that hardware
  1565. plugin. This helps notify the system to avoid using this address space
  1566. when configuring devices that can remap their memory windows. This function
  1567. should be called during the discovery portion, as it is relevant to the
  1568. system regardless of whether that hardware module is actually initialized
  1569. and used.
  1570. Arguments:
  1571. PhysicalAddress - Supplies the first physical address in use by the hardware
  1572. module.
  1573. Size - Supplies the size of the memory segment, in bytes.
  1574. Return Value:
  1575. None.
  1576. --*/
  1577. KERNEL_API
  1578. VOID
  1579. HlInitializeLock (
  1580. PHARDWARE_MODULE_LOCK Lock
  1581. );
  1582. /*++
  1583. Routine Description:
  1584. This routine initializes a hardware module lock structure. This must be
  1585. called before the lock can be acquired or released.
  1586. Arguments:
  1587. Lock - Supplies a pointer to the lock to initialize.
  1588. Return Value:
  1589. None.
  1590. --*/
  1591. KERNEL_API
  1592. VOID
  1593. HlAcquireLock (
  1594. PHARDWARE_MODULE_LOCK Lock
  1595. );
  1596. /*++
  1597. Routine Description:
  1598. This routine disables interrupts and acquires a high level spin lock.
  1599. Callers should be very careful to avoid doing this in hot paths or for
  1600. very long. This lock is not reentrant.
  1601. Arguments:
  1602. Lock - Supplies a pointer to the lock to acquire.
  1603. Return Value:
  1604. None.
  1605. --*/
  1606. KERNEL_API
  1607. VOID
  1608. HlReleaseLock (
  1609. PHARDWARE_MODULE_LOCK Lock
  1610. );
  1611. /*++
  1612. Routine Description:
  1613. This routine releases a previously acquired high level lock and restores
  1614. interrupts to their previous state.
  1615. Arguments:
  1616. Lock - Supplies a pointer to the lock to release.
  1617. Return Value:
  1618. None.
  1619. --*/