gic.h 3.6 KB

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  1. /*++
  2. Copyright (c) 2013 Minoca Corp.
  3. This file is licensed under the terms of the GNU General Public License
  4. version 3. Alternative licensing terms are available. Contact
  5. info@minocacorp.com for details. See the LICENSE file at the root of this
  6. project for complete licensing information.
  7. Module Name:
  8. gic.h
  9. Abstract:
  10. This header contains definitions for the ARM Generic Interrupt Controller.
  11. Author:
  12. Evan Green 3-Mar-2014
  13. --*/
  14. //
  15. // ------------------------------------------------------------------- Includes
  16. //
  17. //
  18. // ---------------------------------------------------------------- Definitions
  19. //
  20. //
  21. // ------------------------------------------------------ Data Type Definitions
  22. //
  23. /*++
  24. Structure Description:
  25. This structure describes the Generic Interrupt Controller context.
  26. Members:
  27. DistributorBase - Stores the base address of the distributor registers.
  28. CpuInterfaceBase - Stores the base address of the CPU interface.
  29. MaxLines - Stores the maximum line count in this controller.
  30. --*/
  31. typedef struct _GIC_CONTEXT {
  32. VOID *DistributorBase;
  33. VOID *CpuInterfaceBase;
  34. UINT32 MaxLines;
  35. } GIC_CONTEXT, *PGIC_CONTEXT;
  36. //
  37. // -------------------------------------------------------------------- Globals
  38. //
  39. //
  40. // -------------------------------------------------------- Function Prototypes
  41. //
  42. EFI_STATUS
  43. EfipGicInitialize (
  44. PGIC_CONTEXT Context
  45. );
  46. /*++
  47. Routine Description:
  48. This routine initializes a Generic Interrupt Controller. It enables the
  49. controller and masks all interrupt lines.
  50. Arguments:
  51. Context - Supplies the pointer to the controller's context. The base must
  52. be filled in by the caller, and the rest must be zeroed out by the
  53. caller.
  54. Return Value:
  55. EFI Status code.
  56. --*/
  57. VOID
  58. EfipGicBeginInterrupt (
  59. PGIC_CONTEXT Context,
  60. UINT32 *InterruptNumber,
  61. VOID **InterruptContext
  62. );
  63. /*++
  64. Routine Description:
  65. This routine is called when an interrupts comes in. This routine determines
  66. the interrupt source.
  67. Arguments:
  68. Context - Supplies a pointer to the interrupt controller context.
  69. InterruptNumber - Supplies a pointer where interrupt line number will be
  70. returned.
  71. InterruptContext - Supplies a pointer where the platform can store a
  72. pointer's worth of context that will be passed back when ending the
  73. interrupt.
  74. Return Value:
  75. None.
  76. --*/
  77. VOID
  78. EfipGicEndInterrupt (
  79. PGIC_CONTEXT Context,
  80. UINT32 InterruptNumber,
  81. VOID *InterruptContext
  82. );
  83. /*++
  84. Routine Description:
  85. This routine is called to finish handling of a platform interrupt. This is
  86. where the End-Of-Interrupt would get sent to the interrupt controller.
  87. Arguments:
  88. Context - Supplies a pointer to the interrupt controller context.
  89. InterruptNumber - Supplies the interrupt number that occurred.
  90. InterruptContext - Supplies the context returned by the interrupt
  91. controller when the interrupt began.
  92. Return Value:
  93. None.
  94. --*/
  95. EFI_STATUS
  96. EfipGicSetLineState (
  97. PGIC_CONTEXT Context,
  98. UINT32 LineNumber,
  99. BOOLEAN Enabled,
  100. BOOLEAN EdgeTriggered
  101. );
  102. /*++
  103. Routine Description:
  104. This routine enables or disables an interrupt line.
  105. Arguments:
  106. Context - Supplies the pointer to the controller's context.
  107. LineNumber - Supplies the line number to enable or disable.
  108. Enabled - Supplies a boolean indicating if the line should be enabled or
  109. disabled.
  110. EdgeTriggered - Supplies a boolean indicating if the interrupt is edge
  111. triggered (TRUE) or level triggered (FALSE).
  112. Return Value:
  113. EFI Status code.
  114. --*/