Implement /dev/coreboot

The device currently doesn't do a lot, but it *does* properly scan and build the tables.

Next step will be to create a big JSON string which can be used to read the tables; and
a vga file which can be used for setting up the framebuffer for graphics.

/dev/draw, here we come.

Change-Id: Ibaa122dd3fd59333089d56fb282693a0a3b5b643
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

sys/src/9/k10/coreboot.c

@@ -35,10 +35,8 @@
 #include "fns.h"
 #include "../port/error.h"
 #include "coreboot.h"
-/* coreboot table parsing. 
- */
-
 
+/* this implements the architecture-dependent call needed for port/devcoreboot.c */
 int get_coreboot_info(struct sysinfo_t *info)
 {
 	int ret;
@@ -52,7 +50,7 @@ int get_coreboot_info(struct sysinfo_t *info)
 	ret = cb_parse_header(KADDR(0x00000000), 0x1000, info);
 
 	if (ret != 1) {
-		print("Scan %p\n", KADDR(0xf0000);
+		print("Scan %p\n", KADDR(0xf0000));
 		ret = cb_parse_header(KADDR(0x000f0000), 0x1000, info);
 	}
 	print("get_coreboot_info: ret %d\n", ret);

sys/src/9/k10/k8cpu.json

@@ -20,6 +20,7 @@
 					"arch",
 					"cap",
 					"cons",
+					"coreboot",
 					"draw",
 					"dup",
 					"env",

sys/src/9/k10/main.c

@@ -56,10 +56,6 @@ static int vflag = 1;
 
 int nosmp = 1;
 
-// TODO: convert naming to Plan 9 style
-struct sysinfo_t cbinfo;
-
-
 /*
  *	this may need improvement, but right now it's just for
  *	pretty printing below, so it doesn't need to be accurate
@@ -623,9 +619,6 @@ if (0){	acpiinit(); hi("	acpiinit();\n");}
 		testiccs();
 	}
 
-	/* coreboot stuff. Later, this becomes a device. */
-	get_coreboot_info(&cbinfo);
-
 	print("CPU Freq. %dMHz\n", mach->cpumhz);
 
 	print("schedinit...\n");

sys/src/9/port/devcoreboot.c

@@ -321,3 +321,135 @@ int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
 	return 1;
 }
 
+enum{
+	Qdir,
+	Qtable,
+};
+
+static Dirtab corebootdir[]={
+	".",	{Qdir, 0, QTDIR},	0,			DMDIR|0555,
+	"table",	{Qtable},	0,			0444,
+};
+
+static struct sysinfo_t cbinfo;
+
+static int
+corebootdevgen(Chan *c, char *name, Dirtab *tab, int ntab, int i, Dir *dp)
+{
+	int rc;
+
+	rc = devgen(c, name, tab, ntab, i, dp);
+	return rc;
+}
+
+static void
+corebootinit(void)
+{
+	get_coreboot_info(&cbinfo);
+}
+
+static Chan*
+corebootattach(char *spec)
+{
+	return devattach('Y', spec);
+}
+
+static Walkqid*
+corebootwalk(Chan *c, Chan *nc, char **name, int nname)
+{
+	Walkqid *wq;
+
+	wq = devwalk(c, nc, name, nname, corebootdir, nelem(corebootdir), devgen);
+	/* todo: cover any cases that need locking. There are none yet. */
+	return wq;
+}
+
+static int
+corebootstat(Chan *c, unsigned char *db, int n)
+{
+	return devstat(c, db, n, corebootdir, nelem(corebootdir), corebootdevgen);
+}
+
+static Chan*
+corebootopen(Chan *c, int omode)
+{
+	switch((uint32_t)c->qid.path){
+	case Qdir:
+		if(omode != OREAD)
+			error(Eperm);
+		break;
+	/* default are tables, which are unchanging, and readonly, so no need to lock them.
+	 * They live in reserved memory.
+	 */
+	default:
+		break;
+	}
+	c->mode = openmode(omode);
+	c->flag |= COPEN;
+	c->offset = 0;
+	return c;
+}
+
+static void
+corebootcreate(Chan *c, char *j, int i, int u)
+{
+	error(Eperm);
+}
+
+static void
+corebootclose(Chan *c)
+{
+	/* anything to do? */
+}
+
+
+static int32_t
+corebootread(Chan *c, void *va, int32_t n, int64_t off)
+{
+	switch((uint32_t)c->qid.path){
+	case Qdir:
+		return devdirread(c, va, n, corebootdir, nelem(corebootdir), corebootdevgen);
+	case Qtable:
+		/* todo: do something */
+		break;
+	}
+	return 0;
+}
+
+static int32_t
+corebootwrite(Chan *c, void *va, int32_t n, int64_t r)
+{
+	switch((uint32_t)c->qid.path){
+	case Qdir:
+		error(Eisdir);
+		break;
+	default:
+		error(Eperm);
+		break;
+	}
+
+	error(Egreg);
+	return -1;
+}
+
+Dev corebootdevtab = {
+	'Y',
+	"coreboot",
+
+	devreset,
+	corebootinit,
+	devshutdown,
+	corebootattach,
+	corebootwalk,
+	corebootstat,
+	corebootopen,
+	corebootcreate,
+	corebootclose,
+	corebootread,
+	devbread,
+	corebootwrite,
+	devbwrite,
+	devremove,
+	devwstat,
+};
+