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Plan 9 from Bell Labs 2010-10-29

David du Colombier 13 years ago
parent
commit
46348f5be5
5 changed files with 23 additions and 13 deletions
  1. 1 1
      sys/src/9/omap/archomap.c
  2. 2 1
      sys/src/9/omap/clock.c
  3. 15 3
      sys/src/9/omap/trap.c
  4. 2 6
      sys/src/9/omap/ucalloc.c
  5. 3 2
      sys/src/9/omap/uncached.h

+ 1 - 1
sys/src/9/omap/archomap.c

@@ -1267,7 +1267,7 @@ archreboot(void)
 
 	/* shouldn't get here */
 	splhi();
-	iprint("waiting");
+	iprint("awaiting reset");
 	for(;;) {
 		delay(1000);
 		print(".");

+ 2 - 1
sys/src/9/omap/clock.c

@@ -23,13 +23,14 @@ enum {
 	Tn0		= PHYSTIMER1,
 	Tn1		= PHYSTIMER2,
 
+	/* irq 36 is watchdog timer module 3 overflow */
 	Tn0irq		= 37,			/* base IRQ for all timers */
 
 	Freebase	= 1,			/* base of free-running timer */
 
 	/*
 	 * clock is 32K (32,768) Hz, so one tick is 30.517µs,
-	 * so 327.68 ticks is 10ms, 32.768 tick is 1ms.
+	 * so 327.68 ticks is 10ms, 32.768 ticks is 1ms.
 	 */
 	Clockfreqbase	= 32 * 1024,		/* base rate in Hz */
 	Tcycles		= Clockfreqbase / HZ,	/* cycles per clock tick */

+ 15 - 3
sys/src/9/omap/trap.c

@@ -386,12 +386,24 @@ irq(Ureg* ureg)
 			handled++;
 		}
 	if(!handled) {
-		print("unknown interrupt: irq %d", irqno);
+		iprint("unexpected interrupt: irq %d", irqno);
+		switch (irqno) {
+		case 56:
+		case 57:
+			iprint(" (I⁲C)");
+			break;
+		case 83:
+		case 86:
+		case 94:
+			iprint(" (MMC)");
+			break;
+		}
+
 		if(irqno < nelem(vctl)) {
 			intcmask(irqno);
-			print(", now masked");
+			iprint(", now masked");
 		}
-		print("\n");
+		iprint("\n");
 	}
 	t = perfticks();
 	ninterrupt++;

+ 2 - 6
sys/src/9/omap/ucalloc.c

@@ -84,16 +84,12 @@ ucarena(usize size)
 	assert(size == 1*MiB);
 
 	mainmem->maxsize += 1*MiB;
-	if((v = mallocalign(1*MiB, 1*MiB, 0, 0)) == nil){
-		mainmem->maxsize -= 1*MiB;
-		return nil;
-	}
-	if((uv = mmuuncache(v, 1*MiB)) == nil){
+	if((v = mallocalign(1*MiB, 1*MiB, 0, 0)) == nil ||
+	    (uv = mmuuncache(v, 1*MiB)) == nil){
 		free(v);
 		mainmem->maxsize -= 1*MiB;
 		return nil;
 	}
-
 	return uv;
 }
 

+ 3 - 2
sys/src/9/omap/uncached.h

@@ -7,10 +7,11 @@
  * from usbehci.  so, at least for now, we will use uncached memory until
  * we sort out the write-back problems.
  */
-#define smalloc(n)		myucalloc(n)
 #define free			ucfree
+#define malloc			myucalloc
+#define mallocz			ucallocz
+#define smalloc			myucalloc
 #define xspanalloc		ucallocalign
-#define mallocz(n, clr)		ucallocz(n, clr)
 
 #define allocb			ucallocb
 #define iallocb			uciallocb