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@@ -1,518 +1 @@
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-/*
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- * VFPv2 or VFPv3 floating point unit
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- */
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-#include "u.h"
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-#include "../port/lib.h"
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-#include "mem.h"
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-#include "dat.h"
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-#include "fns.h"
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-#include "ureg.h"
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-#include "arm.h"
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-
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-/* subarchitecture code in m->havefp */
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-enum {
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- VFPv2 = 2,
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- VFPv3 = 3,
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-};
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-
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-/* fp control regs. most are read-only */
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-enum {
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- Fpsid = 0,
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- Fpscr = 1, /* rw */
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- Mvfr1 = 6,
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- Mvfr0 = 7,
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- Fpexc = 8, /* rw */
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- Fpinst= 9, /* optional, for exceptions */
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- Fpinst2=10,
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-};
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-enum {
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- /* Fpexc bits */
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- Fpex = 1u << 31,
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- Fpenabled = 1 << 30,
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- Fpdex = 1 << 29, /* defined synch exception */
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-// Fp2v = 1 << 28, /* Fpinst2 reg is valid */
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-// Fpvv = 1 << 27, /* if Fpdex, vecitr is valid */
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-// Fptfv = 1 << 26, /* trapped fault is valid */
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-// Fpvecitr = MASK(3) << 8,
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- /* FSR bits appear here */
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- Fpmbc = Fpdex, /* bits exception handler must clear */
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-
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- /* Fpscr bits; see u.h for more */
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- Stride = MASK(2) << 20,
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- Len = MASK(3) << 16,
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- Dn= 1 << 25,
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- Fz= 1 << 24,
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- /* trap exception enables (not allowed in vfp3) */
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- FPIDNRM = 1 << 15, /* input denormal */
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- Alltraps = FPIDNRM | FPINEX | FPUNFL | FPOVFL | FPZDIV | FPINVAL,
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- /* pending exceptions */
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- FPAIDNRM = 1 << 7, /* input denormal */
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- Allexc = FPAIDNRM | FPAINEX | FPAUNFL | FPAOVFL | FPAZDIV | FPAINVAL,
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- /* condition codes */
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- Allcc = MASK(4) << 28,
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-};
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-enum {
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- /* CpCPaccess bits */
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- Cpaccnosimd = 1u << 31,
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- Cpaccd16 = 1 << 30,
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-};
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-
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-static char *
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-subarch(int impl, uint sa)
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-{
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- static char *armarchs[] = {
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- "VFPv1 (unsupported)",
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- "VFPv2",
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- "VFPv3+ with common VFP subarch v2",
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- "VFPv3+ with null subarch",
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- "VFPv3+ with common VFP subarch v3",
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- };
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-
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- if (impl != 'A' || sa >= nelem(armarchs))
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- return "GOK";
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- else
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- return armarchs[sa];
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-}
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-
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-static char *
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-implement(uchar impl)
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-{
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- if (impl == 'A')
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- return "arm";
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- else
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- return "unknown";
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-}
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-
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-static int
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-havefp(void)
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-{
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- int gotfp;
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- ulong acc, sid;
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-
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- if (m->havefpvalid)
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- return m->havefp;
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-
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- m->havefp = 0;
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- gotfp = 1 << CpFP | 1 << CpDFP;
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- cpwrsc(0, CpCONTROL, 0, CpCPaccess, MASK(28));
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- acc = cprdsc(0, CpCONTROL, 0, CpCPaccess);
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- if ((acc & (MASK(2) << (2*CpFP))) == 0) {
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- gotfp &= ~(1 << CpFP);
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- print("fpon: no single FP coprocessor\n");
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- }
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- if ((acc & (MASK(2) << (2*CpDFP))) == 0) {
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- gotfp &= ~(1 << CpDFP);
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- print("fpon: no double FP coprocessor\n");
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- }
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- if (!gotfp) {
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- print("fpon: no FP coprocessors\n");
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- m->havefpvalid = 1;
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- return 0;
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- }
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- m->fpon = 1; /* don't panic */
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- sid = fprd(Fpsid);
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- m->fpon = 0;
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- switch((sid >> 16) & MASK(7)){
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- case 0: /* VFPv1 */
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- break;
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- case 1: /* VFPv2 */
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- m->havefp = VFPv2;
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- m->fpnregs = 16;
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- break;
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- default: /* VFPv3 or later */
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- m->havefp = VFPv3;
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- m->fpnregs = (acc & Cpaccd16) ? 16 : 32;
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- break;
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- }
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- if (m->machno == 0)
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- print("fp: %d registers, %s simd\n", m->fpnregs,
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- (acc & Cpaccnosimd? " no": ""));
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- m->havefpvalid = 1;
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- return 1;
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-}
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-
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-/*
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- * these can be called to turn the fpu on or off for user procs,
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- * not just at system start up or shutdown.
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- */
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-
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-void
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-fpoff(void)
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-{
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- if (m->fpon) {
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- fpwr(Fpexc, 0);
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- m->fpon = 0;
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- }
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-}
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-
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-void
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-fpononly(void)
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-{
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- if (!m->fpon && havefp()) {
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- /* enable fp. must be first operation on the FPUs. */
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- fpwr(Fpexc, Fpenabled);
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- m->fpon = 1;
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- }
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-}
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-
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-static void
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-fpcfg(void)
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-{
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- int impl;
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- ulong sid;
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- static int printed;
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-
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- /* clear pending exceptions; no traps in vfp3; all v7 ops are scalar */
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- m->fpscr = Dn | Fz | FPRNR | (FPINVAL | FPZDIV | FPOVFL) & ~Alltraps;
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- fpwr(Fpscr, m->fpscr);
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- m->fpconfiged = 1;
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-
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- if (printed)
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- return;
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- sid = fprd(Fpsid);
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- impl = sid >> 24;
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- print("fp: %s arch %s; rev %ld\n", implement(impl),
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- subarch(impl, (sid >> 16) & MASK(7)), sid & MASK(4));
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- printed = 1;
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-}
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-
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-void
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-fpinit(void)
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-{
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- if (havefp()) {
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- fpononly();
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- fpcfg();
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- }
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-}
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-
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-void
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-fpon(void)
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-{
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- if (havefp()) {
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- fpononly();
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- if (m->fpconfiged)
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- fpwr(Fpscr, (fprd(Fpscr) & Allcc) | m->fpscr);
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- else
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- fpcfg(); /* 1st time on this fpu; configure it */
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- }
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-}
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-
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-void
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-fpclear(void)
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-{
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-// ulong scr;
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-
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- fpon();
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-// scr = fprd(Fpscr);
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-// m->fpscr = scr & ~Allexc;
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-// fpwr(Fpscr, m->fpscr);
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-
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- fpwr(Fpexc, fprd(Fpexc) & ~Fpmbc);
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-}
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-
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-
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-/*
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- * Called when a note is about to be delivered to a
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- * user process, usually at the end of a system call.
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- * Note handlers are not allowed to use the FPU so
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- * the state is marked (after saving if necessary) and
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- * checked in the Device Not Available handler.
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- */
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-void
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-fpunotify(Ureg*)
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-{
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- if(up->fpstate == FPactive){
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- fpsave(&up->fpsave);
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- up->fpstate = FPinactive;
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- }
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- up->fpstate |= FPillegal;
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-}
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-
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-/*
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- * Called from sysnoted() via the machine-dependent
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- * noted() routine.
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- * Clear the flag set above in fpunotify().
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- */
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-void
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-fpunoted(void)
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-{
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- up->fpstate &= ~FPillegal;
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-}
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-
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-/*
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- * Called early in the non-interruptible path of
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- * sysrfork() via the machine-dependent syscall() routine.
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- * Save the state so that it can be easily copied
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- * to the child process later.
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- */
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-void
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-fpusysrfork(Ureg*)
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-{
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- if(up->fpstate == FPactive){
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- fpsave(&up->fpsave);
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- up->fpstate = FPinactive;
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- }
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-}
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-
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-/*
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- * Called later in sysrfork() via the machine-dependent
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- * sysrforkchild() routine.
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- * Copy the parent FPU state to the child.
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- */
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-void
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-fpusysrforkchild(Proc *p, Ureg *, Proc *up)
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-{
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- /* don't penalize the child, it hasn't done FP in a note handler. */
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- p->fpstate = up->fpstate & ~FPillegal;
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-}
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-
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-/* should only be called if p->fpstate == FPactive */
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-void
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-fpsave(FPsave *fps)
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-{
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- int n;
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-
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- fpon();
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- fps->control = fps->status = fprd(Fpscr);
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- assert(m->fpnregs);
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- for (n = 0; n < m->fpnregs; n++)
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- fpsavereg(n, (uvlong *)fps->regs[n]);
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- fpoff();
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-}
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-
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-static void
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-fprestore(Proc *p)
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-{
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- int n;
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-
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- fpon();
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- fpwr(Fpscr, p->fpsave.control);
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- m->fpscr = fprd(Fpscr) & ~Allcc;
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- assert(m->fpnregs);
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- for (n = 0; n < m->fpnregs; n++)
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- fprestreg(n, *(uvlong *)p->fpsave.regs[n]);
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-}
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-
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-/*
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- * Called from sched() and sleep() via the machine-dependent
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- * procsave() routine.
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- * About to go in to the scheduler.
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- * If the process wasn't using the FPU
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- * there's nothing to do.
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- */
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-void
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-fpuprocsave(Proc *p)
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-{
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- if(p->fpstate == FPactive){
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- if(p->state == Moribund)
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- fpclear();
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- else{
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- /*
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- * Fpsave() stores without handling pending
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- * unmasked exeptions. Postnote() can't be called
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- * here as sleep() already has up->rlock, so
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- * the handling of pending exceptions is delayed
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- * until the process runs again and generates an
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- * emulation fault to activate the FPU.
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- */
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- fpsave(&p->fpsave);
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- }
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- p->fpstate = FPinactive;
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- }
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-}
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-
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-/*
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- * The process has been rescheduled and is about to run.
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- * Nothing to do here right now. If the process tries to use
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- * the FPU again it will cause a Device Not Available
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- * exception and the state will then be restored.
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- */
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-void
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-fpuprocrestore(Proc *)
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-{
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-}
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-
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-/*
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- * Disable the FPU.
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- * Called from sysexec() via sysprocsetup() to
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- * set the FPU for the new process.
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- */
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-void
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-fpusysprocsetup(Proc *p)
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-{
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- p->fpstate = FPinit;
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- fpoff();
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-}
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-
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-static void
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-mathnote(void)
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-{
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- ulong status;
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- char *msg, note[ERRMAX];
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-
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- status = up->fpsave.status;
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-
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- /*
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- * Some attention should probably be paid here to the
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- * exception masks and error summary.
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- */
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- if (status & FPAINEX)
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- msg = "inexact";
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- else if (status & FPAOVFL)
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- msg = "overflow";
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- else if (status & FPAUNFL)
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- msg = "underflow";
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- else if (status & FPAZDIV)
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- msg = "divide by zero";
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- else if (status & FPAINVAL)
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- msg = "bad operation";
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- else
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- msg = "spurious";
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- snprint(note, sizeof note, "sys: fp: %s fppc=%#p status=%#lux",
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- msg, up->fpsave.pc, status);
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- postnote(up, 1, note, NDebug);
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-}
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-
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-static void
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-mathemu(Ureg *)
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-{
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- if(m->havefp == VFPv3 && !(fprd(Fpexc) & (Fpex|Fpdex)))
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- iprint("mathemu: not an FP exception but an unknown FP opcode\n");
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- switch(up->fpstate){
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- case FPemu:
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- error("illegal instruction: VFP opcode in emulated mode");
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- case FPinit:
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- fpinit();
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- up->fpstate = FPactive;
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- break;
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- case FPinactive:
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- /*
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- * Before restoring the state, check for any pending
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- * exceptions. There's no way to restore the state without
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- * generating an unmasked exception.
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- * More attention should probably be paid here to the
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- * exception masks and error summary.
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- */
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- if(up->fpsave.status & (FPAINEX|FPAUNFL|FPAOVFL|FPAZDIV|FPAINVAL)){
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- mathnote();
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- break;
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- }
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- fprestore(up);
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- up->fpstate = FPactive;
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- break;
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- case FPactive:
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- error("illegal instruction: bad vfp fpu opcode");
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- break;
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- }
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- fpclear();
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-}
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-
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-void
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-fpstuck(uintptr pc)
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-{
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- if (m->fppc == pc && m->fppid == up->pid) {
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- m->fpcnt++;
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- if (m->fpcnt > 4)
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- panic("fpuemu: cpu%d stuck at pid %ld %s pc %#p "
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- "instr %#8.8lux", m->machno, up->pid, up->text,
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- pc, *(ulong *)pc);
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- } else {
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- m->fppid = up->pid;
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- m->fppc = pc;
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- m->fpcnt = 0;
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- }
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-}
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-
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-enum {
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- N = 1<<31,
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- Z = 1<<30,
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- C = 1<<29,
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- V = 1<<28,
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- REGPC = 15,
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-};
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-
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-static int
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-condok(int cc, int c)
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-{
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- switch(c){
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- case 0: /* Z set */
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- return cc&Z;
|
|
|
- case 1: /* Z clear */
|
|
|
- return (cc&Z) == 0;
|
|
|
- case 2: /* C set */
|
|
|
- return cc&C;
|
|
|
- case 3: /* C clear */
|
|
|
- return (cc&C) == 0;
|
|
|
- case 4: /* N set */
|
|
|
- return cc&N;
|
|
|
- case 5: /* N clear */
|
|
|
- return (cc&N) == 0;
|
|
|
- case 6: /* V set */
|
|
|
- return cc&V;
|
|
|
- case 7: /* V clear */
|
|
|
- return (cc&V) == 0;
|
|
|
- case 8: /* C set and Z clear */
|
|
|
- return cc&C && (cc&Z) == 0;
|
|
|
- case 9: /* C clear or Z set */
|
|
|
- return (cc&C) == 0 || cc&Z;
|
|
|
- case 10: /* N set and V set, or N clear and V clear */
|
|
|
- return (~cc&(N|V))==0 || (cc&(N|V)) == 0;
|
|
|
- case 11: /* N set and V clear, or N clear and V set */
|
|
|
- return (cc&(N|V))==N || (cc&(N|V))==V;
|
|
|
- case 12: /* Z clear, and either N set and V set or N clear and V clear */
|
|
|
- return (cc&Z) == 0 && ((~cc&(N|V))==0 || (cc&(N|V))==0);
|
|
|
- case 13: /* Z set, or N set and V clear or N clear and V set */
|
|
|
- return (cc&Z) || (cc&(N|V))==N || (cc&(N|V))==V;
|
|
|
- case 14: /* always */
|
|
|
- return 1;
|
|
|
- case 15: /* never (reserved) */
|
|
|
- return 0;
|
|
|
- }
|
|
|
- return 0; /* not reached */
|
|
|
-}
|
|
|
-
|
|
|
-/* only called to deal with user-mode instruction faults */
|
|
|
-int
|
|
|
-fpuemu(Ureg* ureg)
|
|
|
-{
|
|
|
- int s, nfp, cop, op;
|
|
|
- uintptr pc;
|
|
|
-
|
|
|
- if(waserror()){
|
|
|
- postnote(up, 1, up->errstr, NDebug);
|
|
|
- return 1;
|
|
|
- }
|
|
|
-
|
|
|
- if(up->fpstate & FPillegal)
|
|
|
- error("floating point in note handler");
|
|
|
-
|
|
|
- nfp = 0;
|
|
|
- pc = ureg->pc;
|
|
|
- validaddr(pc, 4, 0);
|
|
|
- if(!condok(ureg->psr, *(ulong*)pc >> 28))
|
|
|
- iprint("fpuemu: conditional instr shouldn't have got here\n");
|
|
|
- op = (*(ulong *)pc >> 24) & MASK(4);
|
|
|
- cop = (*(ulong *)pc >> 8) & MASK(4);
|
|
|
- if(m->fpon)
|
|
|
- fpstuck(pc); /* debugging; could move down 1 line */
|
|
|
- if (ISFPAOP(cop, op)) { /* old arm 7500 fpa opcode? */
|
|
|
-// iprint("fpuemu: fpa instr %#8.8lux at %#p\n", *(ulong *)pc, pc);
|
|
|
-// error("illegal instruction: old arm 7500 fpa opcode");
|
|
|
- s = spllo();
|
|
|
- if(waserror()){
|
|
|
- splx(s);
|
|
|
- nexterror();
|
|
|
- }
|
|
|
- nfp = fpiarm(ureg); /* advances pc past emulated instr(s) */
|
|
|
- if (nfp > 1) /* could adjust this threshold */
|
|
|
- m->fppc = m->fpcnt = 0;
|
|
|
- splx(s);
|
|
|
- poperror();
|
|
|
- } else if (ISVFPOP(cop, op)) { /* if vfp, fpu must be off */
|
|
|
- mathemu(ureg); /* enable fpu & retry */
|
|
|
- nfp = 1;
|
|
|
- }
|
|
|
-
|
|
|
- poperror();
|
|
|
- return nfp;
|
|
|
-}
|
|
|
+#include "../teg2/vfp3.c"
|
David du Colombier