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virtio_pci.h 7.5 KB

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  1. /*
  2. * Virtio PCI driver
  3. *
  4. * This module allows virtio devices to be used over a virtual PCI device.
  5. * This can be used with QEMU based VMMs like KVM or Xen.
  6. *
  7. * Copyright IBM Corp. 2007
  8. *
  9. * Authors:
  10. * Anthony Liguori <aliguori@us.ibm.com>
  11. *
  12. * This header is BSD licensed so anyone can use the definitions to implement
  13. * compatible drivers/servers.
  14. *
  15. * Redistribution and use in source and binary forms, with or without
  16. * modification, are permitted provided that the following conditions
  17. * are met:
  18. * 1. Redistributions of source code must retain the above copyright
  19. * notice, this list of conditions and the following disclaimer.
  20. * 2. Redistributions in binary form must reproduce the above copyright
  21. * notice, this list of conditions and the following disclaimer in the
  22. * documentation and/or other materials provided with the distribution.
  23. * 3. Neither the name of IBM nor the names of its contributors
  24. * may be used to endorse or promote products derived from this software
  25. * without specific prior written permission.
  26. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND
  27. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  28. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  29. * ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE
  30. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  31. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  32. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  33. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  34. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  35. * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  36. * SUCH DAMAGE.
  37. */
  38. #ifndef VIRTIO_PCI_NO_LEGACY
  39. /* A 32-bit r/o bitmask of the features supported by the host */
  40. #define VIRTIO_PCI_HOST_FEATURES 0
  41. /* A 32-bit r/w bitmask of features activated by the guest */
  42. #define VIRTIO_PCI_GUEST_FEATURES 4
  43. /* A 32-bit r/w PFN for the currently selected queue */
  44. #define VIRTIO_PCI_QUEUE_PFN 8
  45. /* A 16-bit r/o queue size for the currently selected queue */
  46. #define VIRTIO_PCI_QUEUE_NUM 12
  47. /* A 16-bit r/w queue selector */
  48. #define VIRTIO_PCI_QUEUE_SEL 14
  49. /* A 16-bit r/w queue notifier */
  50. #define VIRTIO_PCI_QUEUE_NOTIFY 16
  51. /* An 8-bit device status register. */
  52. #define VIRTIO_PCI_STATUS 18
  53. /* An 8-bit r/o interrupt status register. Reading the value will return the
  54. * current contents of the ISR and will also clear it. This is effectively
  55. * a read-and-acknowledge. */
  56. #define VIRTIO_PCI_ISR 19
  57. /* MSI-X registers: only enabled if MSI-X is enabled. */
  58. /* A 16-bit vector for configuration changes. */
  59. #define VIRTIO_MSI_CONFIG_VECTOR 20
  60. /* A 16-bit vector for selected queue notifications. */
  61. #define VIRTIO_MSI_QUEUE_VECTOR 22
  62. /* The remaining space is defined by each driver as the per-driver
  63. * configuration space */
  64. #define VIRTIO_PCI_CONFIG_OFF(msix_enabled) ((msix_enabled) ? 24 : 20)
  65. /* Deprecated: please use VIRTIO_PCI_CONFIG_OFF instead */
  66. #define VIRTIO_PCI_CONFIG(dev) VIRTIO_PCI_CONFIG_OFF((dev)->msix_enabled)
  67. /* Virtio ABI version, this must match exactly */
  68. #define VIRTIO_PCI_ABI_VERSION 0
  69. /* How many bits to shift physical queue address written to QUEUE_PFN.
  70. * 12 is historical, and due to x86 page size. */
  71. #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
  72. /* The alignment to use between consumer and producer parts of vring.
  73. * x86 pagesize again. */
  74. #define VIRTIO_PCI_VRING_ALIGN 4096
  75. #endif /* VIRTIO_PCI_NO_LEGACY */
  76. /* The bit of the ISR which indicates a device configuration change. */
  77. #define VIRTIO_PCI_ISR_CONFIG 0x2
  78. /* Vector value used to disable MSI for queue */
  79. #define VIRTIO_MSI_NO_VECTOR 0xffff
  80. #ifndef VIRTIO_PCI_NO_MODERN
  81. /* IDs for different capabilities. Must all exist. */
  82. /* Common configuration */
  83. #define VIRTIO_PCI_CAP_COMMON_CFG 1
  84. /* Notifications */
  85. #define VIRTIO_PCI_CAP_NOTIFY_CFG 2
  86. /* ISR access */
  87. #define VIRTIO_PCI_CAP_ISR_CFG 3
  88. /* Device specific configuration */
  89. #define VIRTIO_PCI_CAP_DEVICE_CFG 4
  90. /* PCI configuration access */
  91. #define VIRTIO_PCI_CAP_PCI_CFG 5
  92. /* This is the PCI capability header: */
  93. struct virtio_pci_cap {
  94. uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
  95. uint8_t cap_next; /* Generic PCI field: next ptr. */
  96. uint8_t cap_len; /* Generic PCI field: capability length */
  97. uint8_t cfg_type; /* Identifies the structure. */
  98. uint8_t bar; /* Where to find it. */
  99. uint8_t padding[3]; /* Pad to full dword. */
  100. uint32_t offset; /* Offset within bar. */
  101. uint32_t length; /* Length of the structure, in bytes. */
  102. };
  103. struct virtio_pci_notify_cap {
  104. struct virtio_pci_cap cap;
  105. uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */
  106. };
  107. /* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
  108. struct virtio_pci_common_cfg {
  109. /* About the whole device. */
  110. uint32_t device_feature_select; /* read-write */
  111. uint32_t device_feature; /* read-only */
  112. uint32_t guest_feature_select; /* read-write */
  113. uint32_t guest_feature; /* read-write */
  114. uint16_t msix_config; /* read-write */
  115. uint16_t num_queues; /* read-only */
  116. uint8_t device_status; /* read-write */
  117. uint8_t config_generation; /* read-only */
  118. /* About a specific virtqueue. */
  119. uint16_t queue_select; /* read-write */
  120. uint16_t queue_size; /* read-write, power of 2. */
  121. uint16_t queue_msix_vector; /* read-write */
  122. uint16_t queue_enable; /* read-write */
  123. uint16_t queue_notify_off; /* read-only */
  124. uint32_t queue_desc_lo; /* read-write */
  125. uint32_t queue_desc_hi; /* read-write */
  126. uint32_t queue_avail_lo; /* read-write */
  127. uint32_t queue_avail_hi; /* read-write */
  128. uint32_t queue_used_lo; /* read-write */
  129. uint32_t queue_used_hi; /* read-write */
  130. };
  131. /* Fields in VIRTIO_PCI_CAP_PCI_CFG: */
  132. struct virtio_pci_cfg_cap {
  133. struct virtio_pci_cap cap;
  134. uint8_t pci_cfg_data[4]; /* Data for BAR access. */
  135. };
  136. /* Macro versions of offsets for the Old Timers! */
  137. #define VIRTIO_PCI_CAP_VNDR 0
  138. #define VIRTIO_PCI_CAP_NEXT 1
  139. #define VIRTIO_PCI_CAP_LEN 2
  140. #define VIRTIO_PCI_CAP_CFG_TYPE 3
  141. #define VIRTIO_PCI_CAP_BAR 4
  142. #define VIRTIO_PCI_CAP_OFFSET 8
  143. #define VIRTIO_PCI_CAP_LENGTH 12
  144. #define VIRTIO_PCI_NOTIFY_CAP_MULT 16
  145. #define VIRTIO_PCI_COMMON_DFSELECT 0
  146. #define VIRTIO_PCI_COMMON_DF 4
  147. #define VIRTIO_PCI_COMMON_GFSELECT 8
  148. #define VIRTIO_PCI_COMMON_GF 12
  149. #define VIRTIO_PCI_COMMON_MSIX 16
  150. #define VIRTIO_PCI_COMMON_NUMQ 18
  151. #define VIRTIO_PCI_COMMON_STATUS 20
  152. #define VIRTIO_PCI_COMMON_CFGGENERATION 21
  153. #define VIRTIO_PCI_COMMON_Q_SELECT 22
  154. #define VIRTIO_PCI_COMMON_Q_SIZE 24
  155. #define VIRTIO_PCI_COMMON_Q_MSIX 26
  156. #define VIRTIO_PCI_COMMON_Q_ENABLE 28
  157. #define VIRTIO_PCI_COMMON_Q_NOFF 30
  158. #define VIRTIO_PCI_COMMON_Q_DESCLO 32
  159. #define VIRTIO_PCI_COMMON_Q_DESCHI 36
  160. #define VIRTIO_PCI_COMMON_Q_AVAILLO 40
  161. #define VIRTIO_PCI_COMMON_Q_AVAILHI 44
  162. #define VIRTIO_PCI_COMMON_Q_USEDLO 48
  163. #define VIRTIO_PCI_COMMON_Q_USEDHI 52
  164. #endif /* VIRTIO_PCI_NO_MODERN */
  165. /* we're not sure where these should go; for now, they go here. */
  166. // Virtio-pci device type constants, from
  167. // http://git.qemu.org/?p=qemu.git;a=blob;f=include/hw/pci/pci.h
  168. #define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4
  169. #define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4
  170. #define PCI_SUBDEVICE_ID_QEMU 0x1100
  171. #define PCI_DEVICE_ID_VIRTIO_NET 0x1000
  172. #define PCI_DEVICE_ID_VIRTIO_BLOCK 0x1001
  173. #define PCI_DEVICE_ID_VIRTIO_BALLOON 0x1002
  174. #define PCI_DEVICE_ID_VIRTIO_CONSOLE 0x1003
  175. #define PCI_DEVICE_ID_VIRTIO_SCSI 0x1004
  176. #define PCI_DEVICE_ID_VIRTIO_RNG 0x1005
  177. #define PCI_DEVICE_ID_VIRTIO_9P 0x1009