dat.h 9.4 KB

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  1. /*
  2. * This file is part of the UCB release of Plan 9. It is subject to the license
  3. * terms in the LICENSE file found in the top-level directory of this
  4. * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
  5. * part of the UCB release of Plan 9, including this file, may be copied,
  6. * modified, propagated, or distributed except according to the terms contained
  7. * in the LICENSE file.
  8. */
  9. typedef struct ACVctl ACVctl;
  10. typedef struct Conf Conf;
  11. typedef struct Confmem Confmem;
  12. typedef struct Fxsave Fxsave;
  13. typedef struct ICC ICC;
  14. typedef struct ICCparms ICCparms;
  15. typedef struct ISAConf ISAConf;
  16. typedef struct Label Label;
  17. typedef struct Lock Lock;
  18. typedef struct MCPU MCPU;
  19. typedef struct MFPU MFPU;
  20. typedef struct MMMU MMMU;
  21. typedef struct NIX NIX;
  22. typedef struct Mach Mach;
  23. typedef uint64_t Mpl;
  24. typedef struct Page Page;
  25. typedef struct Pcidev Pcidev;
  26. typedef struct PFPU PFPU;
  27. typedef struct PmcCtr PmcCtr;
  28. typedef struct PmcCtl PmcCtl;
  29. typedef struct PmcWait PmcWait;
  30. typedef struct PMMU PMMU;
  31. typedef struct PNOTIFY PNOTIFY;
  32. typedef uint64_t PTE;
  33. typedef struct Proc Proc;
  34. typedef struct Sys Sys;
  35. typedef struct Stackframe Stackframe;
  36. typedef uint64_t uintmem; /* Physical address (hideous) */
  37. typedef struct Ureg Ureg;
  38. typedef struct Vctl Vctl;
  39. #pragma incomplete Ureg
  40. #define MAXSYSARG 5 /* for mount(fd, afd, mpt, flag, arg) */
  41. /*
  42. * parameters for sysproc.c
  43. */
  44. #define AOUT_MAGIC (S_MAGIC)
  45. #define ELF_MAGIC (ELF_MAG)
  46. /*
  47. * machine dependent definitions used by ../port/portdat.h
  48. */
  49. struct Lock
  50. {
  51. uint32_t key;
  52. int isilock;
  53. Mpl pl;
  54. uintptr_t _pc;
  55. Proc* p;
  56. Mach* m;
  57. uint64_t lockcycles;
  58. };
  59. struct Label
  60. {
  61. uintptr_t sp;
  62. uintptr_t pc;
  63. uintptr_t regs[14];
  64. };
  65. struct Fxsave {
  66. uint16_t fcw; /* x87 control word */
  67. uint16_t fsw; /* x87 status word */
  68. uint8_t ftw; /* x87 tag word */
  69. uint8_t zero; /* 0 */
  70. uint16_t fop; /* last x87 opcode */
  71. uint64_t rip; /* last x87 instruction pointer */
  72. uint64_t rdp; /* last x87 data pointer */
  73. uint32_t mxcsr; /* MMX control and status */
  74. uint32_t mxcsrmask; /* supported MMX feature bits */
  75. unsigned char st[128]; /* shared 64-bit media and x87 regs */
  76. unsigned char xmm[256]; /* 128-bit media regs */
  77. unsigned char ign[96]; /* reserved, ignored */
  78. };
  79. /*
  80. * FPU stuff in Proc
  81. */
  82. struct PFPU {
  83. int fpustate;
  84. unsigned char fxsave[sizeof(Fxsave)+15];
  85. void* fpusave;
  86. };
  87. /*
  88. * MMU stuff in Proc
  89. */
  90. #define NCOLOR 1
  91. struct PMMU
  92. {
  93. Page* mmuptp[4]; /* page table pages for each level */
  94. };
  95. /*
  96. * things saved in the Proc structure during a notify
  97. */
  98. struct PNOTIFY
  99. {
  100. // void emptiness;
  101. char emptiness;
  102. };
  103. struct Confmem
  104. {
  105. uintptr_t base;
  106. usize npage;
  107. uintptr_t kbase;
  108. uintptr_t klimit;
  109. };
  110. struct Conf
  111. {
  112. uint32_t nproc; /* processes */
  113. Confmem mem[4]; /* physical memory */
  114. uint64_t npage; /* total physical pages of memory */
  115. usize upages; /* user page pool */
  116. uint32_t copymode; /* 0 is copy on write, 1 is copy on reference */
  117. uint32_t ialloc; /* max interrupt time allocation in bytes */
  118. uint32_t nimage; /* number of page cache image headers */
  119. };
  120. enum
  121. {
  122. NPGSZ = 4 /* # of supported pages sizes in Mach */
  123. };
  124. #include "../port/portdat.h"
  125. /*
  126. * CPU stuff in Mach.
  127. */
  128. struct MCPU
  129. {
  130. uint32_t cpuinfo[3][4]; /* CPUID Functions 0, 1, and 5 (n.b.: 2-4 are invalid) */
  131. int ncpuinfos; /* number of standard entries */
  132. int ncpuinfoe; /* number of extended entries */
  133. int isintelcpu; /* */
  134. };
  135. /*
  136. * FPU stuff in Mach.
  137. */
  138. struct MFPU
  139. {
  140. uint16_t fcw; /* x87 control word */
  141. uint32_t mxcsr; /* MMX control and status */
  142. uint32_t mxcsrmask; /* supported MMX feature bits */
  143. };
  144. struct NIX
  145. {
  146. ICC* icc; /* inter-core call */
  147. int nixtype;
  148. };
  149. /*
  150. * MMU stuff in Mach.
  151. */
  152. struct MMMU
  153. {
  154. uintptr_t cr2;
  155. Page* pml4; /* pml4 for this processor */
  156. PTE* pmap; /* unused as of yet */
  157. Page pml4kludge; /* NIX KLUDGE: we need a page */
  158. };
  159. /*
  160. * Inter core calls
  161. */
  162. enum
  163. {
  164. ICCLNSZ = 128, /* Cache line size for inter core calls */
  165. ICCOK = 0, /* Return codes: Ok; trap; syscall */
  166. ICCTRAP,
  167. ICCSYSCALL
  168. };
  169. struct ICC
  170. {
  171. /* fn is kept in its own cache line */
  172. union{
  173. void (*fn)(void);
  174. unsigned char _ln1_[ICCLNSZ];
  175. };
  176. int flushtlb; /* on the AC, before running fn */
  177. int rc; /* return code from AC to TC */
  178. char* note; /* to be posted in the TC after returning */
  179. unsigned char data[ICCLNSZ]; /* sent to the AC */
  180. };
  181. /*
  182. * hw perf counters
  183. */
  184. struct PmcCtl {
  185. Ref r;
  186. uint32_t _coreno;
  187. int enab;
  188. int user;
  189. int os;
  190. int nodesc;
  191. char descstr[KNAMELEN];
  192. int reset;
  193. };
  194. struct PmcWait{
  195. Ref r;
  196. Rendez rend;
  197. PmcWait* next;
  198. };
  199. struct PmcCtr{
  200. int stale;
  201. PmcWait *wq;
  202. uint64_t ctr;
  203. int ctrset;
  204. PmcCtl PmcCtl;
  205. int ctlset;
  206. };
  207. enum {
  208. PmcMaxCtrs = 4,
  209. PmcIgn = 0,
  210. PmcGet = 1,
  211. PmcSet = 2,
  212. };
  213. /*
  214. * Per processor information.
  215. *
  216. * The offsets of the first few elements may be known
  217. * to low-level assembly code, so do not re-order:
  218. * self - machp()
  219. * splpc - splhi, spllo, splx
  220. * proc - syscallentry
  221. * stack - acsyscall
  222. * externup - externup()
  223. */
  224. struct Mach
  225. {
  226. /* WARNING! Known to assembly! */
  227. uintptr_t self; /* %gs:0 still gives us a Mach* */
  228. uint64_t splpc; /* pc of last caller to splhi */
  229. Proc* proc; /* current process on this processor */
  230. uintptr_t stack; /* mach stack, kstack is in proc->kstack */
  231. uintptr_t rathole; /* to save a reg in syscallentry */
  232. Proc* externup; /* Forsyth recommends we replace the global up with this. */
  233. /* end warning, I think */
  234. int machno; /* physical id of processor */
  235. int apicno;
  236. int online;
  237. MMMU MMU;
  238. unsigned char* vsvm;
  239. void* gdt;
  240. void* tss;
  241. uint32_t ticks; /* of the clock since boot time */
  242. Label sched; /* scheduler wakeup */
  243. Lock alarmlock; /* access to alarm list */
  244. void* alarm; /* alarms bound to this clock */
  245. int inclockintr;
  246. Proc* readied; /* old runproc, only relevant if kernel booted with nosmp (-n append) */
  247. uint32_t schedticks; /* next forced context switch, same as above */
  248. uint32_t qstart; /* time when up started running */
  249. int qexpired; /* quantum expired */
  250. int tlbfault;
  251. int tlbpurge;
  252. int pfault;
  253. int cs;
  254. int syscall;
  255. int intr;
  256. int mmuflush; /* make current proc flush it's mmu state */
  257. int ilockdepth;
  258. Perf perf; /* performance counters */
  259. int inidle; /* profiling */
  260. int lastintr;
  261. Lock apictimerlock;
  262. uint64_t cyclefreq; /* Frequency of user readable cycle counter */
  263. int64_t cpuhz;
  264. int cpumhz;
  265. uint64_t rdtsc;
  266. Lock pmclock;
  267. PmcCtr pmc[PmcMaxCtrs];
  268. MFPU FPU;
  269. MCPU CPU;
  270. NIX NIX;
  271. };
  272. struct Stackframe
  273. {
  274. Stackframe *next;
  275. uintptr_t pc;
  276. };
  277. /*
  278. * This is the low memory map, between 0x100000 and 0x110000.
  279. * It is located there to allow fundamental datastructures to be
  280. * created and used before knowing where free memory begins
  281. * (e.g. there may be modules located after the kernel BSS end).
  282. * The layout is known in the bootstrap code in l32p.s.
  283. * It is logically two parts: the per processor data structures
  284. * for the bootstrap processor (stack, Mach, vsvm, and page tables),
  285. * and the global information about the system (syspage, ptrpage).
  286. * Some of the elements must be aligned on page boundaries, hence
  287. * the unions.
  288. */
  289. struct Sys {
  290. unsigned char machstk[MACHSTKSZ];
  291. PTE pml4[PTSZ/sizeof(PTE)]; /* */
  292. PTE pdp[PTSZ/sizeof(PTE)];
  293. PTE pd[PTSZ/sizeof(PTE)];
  294. PTE pt[PTSZ/sizeof(PTE)];
  295. unsigned char vsvmpage[4*KiB];
  296. union {
  297. Mach mach;
  298. unsigned char machpage[MACHSZ];
  299. };
  300. union {
  301. struct {
  302. uint64_t pmstart; /* physical memory */
  303. uint64_t pmoccupied; /* how much is occupied */
  304. uint64_t pmend; /* total span */
  305. uintptr_t vmstart; /* base address for malloc */
  306. uintptr_t vmunused; /* 1st unused va */
  307. uintptr_t vmunmapped; /* 1st unmapped va */
  308. uintptr_t vmend; /* 1st unusable va */
  309. uint64_t epoch; /* crude time synchronisation */
  310. int nc[NIXROLES]; /* number of online processors */
  311. int nmach;
  312. int load;
  313. uint32_t ticks; /* of the clock since boot time */
  314. };
  315. unsigned char syspage[4*KiB];
  316. };
  317. union {
  318. Mach* machptr[MACHMAX];
  319. unsigned char ptrpage[4*KiB];
  320. };
  321. uint64_t cyclefreq; /* Frequency of user readable cycle counter (mach 0) */
  322. uint pgszlg2[NPGSZ]; /* per Mach or per Sys? */
  323. uint pgszmask[NPGSZ]; /* Per sys -aki */
  324. uint pgsz[NPGSZ];
  325. int npgsz;
  326. unsigned char _57344_[2][4*KiB]; /* unused */
  327. };
  328. extern Sys *sys;
  329. /*
  330. * KMap
  331. */
  332. typedef void KMap;
  333. extern KMap* kmap(Page*);
  334. #define kunmap(k)
  335. #define VA(k) PTR2UINT(k)
  336. struct
  337. {
  338. Lock l;
  339. int nonline; /* # of active CPUs */
  340. int nbooting; /* # of CPUs waiting for the bTC to go */
  341. int exiting; /* shutdown */
  342. int ispanic; /* shutdown in response to a panic */
  343. int thunderbirdsarego; /* lets the added processors continue */
  344. }active;
  345. /*
  346. * a parsed plan9.ini line
  347. */
  348. #define NISAOPT 8
  349. struct ISAConf {
  350. char *type;
  351. uintptr_t port;
  352. int irq;
  353. uint32_t dma;
  354. uintptr_t mem;
  355. usize size;
  356. uint32_t freq;
  357. int nopt;
  358. char *opt[NISAOPT];
  359. };
  360. /*
  361. * The Mach structures must be available via the per-processor
  362. * MMU information array machptr, mainly for disambiguation and access to
  363. * the clock which is only maintained by the bootstrap processor (0).
  364. */
  365. extern uintptr_t kseg0;
  366. extern char*rolename[];
  367. #pragma varargck type "P" uintmem
  368. /*
  369. * Horrid.
  370. */
  371. // HARVEY: TODO: bring this back, it's actually nice. Or do something better.
  372. // Talk to Ron before you condemn it.
  373. #ifdef _DBGC_
  374. #define DBGFLG (dbgflg[_DBGC_])
  375. #else
  376. #define DBGFLG (0)
  377. #endif /* _DBGC_ */
  378. #define DBG(...) if(!DBGFLG){}else dbgprint(__VA_ARGS__)
  379. extern char dbgflg[256];
  380. #define dbgprint print /* for now */