9.c 4.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131
  1. /*
  2. * This file is part of the UCB release of Plan 9. It is subject to the license
  3. * terms in the LICENSE file found in the top-level directory of this
  4. * distribution and at http://akaros.cs.berkeley.edu/files/Plan9License. No
  5. * part of the UCB release of Plan 9, including this file, may be copied,
  6. * modified, propagated, or distributed except according to the terms contained
  7. * in the LICENSE file.
  8. */
  9. #ifdef HARVEYPPC64
  10. /*
  11. * PowerPC 64 definition
  12. * forsyth@vitanuova.com
  13. */
  14. #include <u.h>
  15. #include <libc.h>
  16. #include <bio.h>
  17. #include "/power64/include/ureg.h"
  18. #include <mach.h>
  19. #define REGOFF(x) offsetof(struct Ureg, x)
  20. #define R31 REGOFF(r31)
  21. #define FP_REG(x) (R31+4+8*(x))
  22. #define REGSIZE sizeof(struct Ureg)
  23. #define FPREGSIZE (8*33)
  24. Reglist power64reglist[] = {
  25. {"CAUSE", REGOFF(cause), RINT|RRDONLY, 'Y'},
  26. {"TRAP", REGOFF(cause), RINT|RRDONLY, 'Y'}, /* alias for acid */
  27. // {"MSR", REGOFF(msr), RINT|RRDONLY, 'Y'},
  28. {"PC", REGOFF(pc), RINT, 'Y'},
  29. {"LR", REGOFF(lr), RINT, 'Y'},
  30. {"CR", REGOFF(cr), RINT, 'X'},
  31. {"XER", REGOFF(xer), RINT, 'Y'},
  32. {"CTR", REGOFF(ctr), RINT, 'Y'},
  33. {"PC", REGOFF(pc), RINT, 'Y'},
  34. {"SP", REGOFF(sp), RINT, 'Y'},
  35. {"R0", REGOFF(r0), RINT, 'Y'},
  36. /* R1 is SP */
  37. {"R2", REGOFF(r2), RINT, 'Y'},
  38. {"R3", REGOFF(r3), RINT, 'Y'},
  39. {"R4", REGOFF(r4), RINT, 'Y'},
  40. {"R5", REGOFF(r5), RINT, 'Y'},
  41. {"R6", REGOFF(r6), RINT, 'Y'},
  42. {"R7", REGOFF(r7), RINT, 'Y'},
  43. {"R8", REGOFF(r8), RINT, 'Y'},
  44. {"R9", REGOFF(r9), RINT, 'Y'},
  45. {"R10", REGOFF(r10), RINT, 'Y'},
  46. {"R11", REGOFF(r11), RINT, 'Y'},
  47. {"R12", REGOFF(r12), RINT, 'Y'},
  48. {"R13", REGOFF(r13), RINT, 'Y'},
  49. {"R14", REGOFF(r14), RINT, 'Y'},
  50. {"R15", REGOFF(r15), RINT, 'Y'},
  51. {"R16", REGOFF(r16), RINT, 'Y'},
  52. {"R17", REGOFF(r17), RINT, 'Y'},
  53. {"R18", REGOFF(r18), RINT, 'Y'},
  54. {"R19", REGOFF(r19), RINT, 'Y'},
  55. {"R20", REGOFF(r20), RINT, 'Y'},
  56. {"R21", REGOFF(r21), RINT, 'Y'},
  57. {"R22", REGOFF(r22), RINT, 'Y'},
  58. {"R23", REGOFF(r23), RINT, 'Y'},
  59. {"R24", REGOFF(r24), RINT, 'Y'},
  60. {"R25", REGOFF(r25), RINT, 'Y'},
  61. {"R26", REGOFF(r26), RINT, 'Y'},
  62. {"R27", REGOFF(r27), RINT, 'Y'},
  63. {"R28", REGOFF(r28), RINT, 'Y'},
  64. {"R29", REGOFF(r29), RINT, 'Y'},
  65. {"R30", REGOFF(r30), RINT, 'Y'},
  66. {"R31", REGOFF(r31), RINT, 'Y'},
  67. {"F0", FP_REG(0), RFLT, 'F'},
  68. {"F1", FP_REG(1), RFLT, 'F'},
  69. {"F2", FP_REG(2), RFLT, 'F'},
  70. {"F3", FP_REG(3), RFLT, 'F'},
  71. {"F4", FP_REG(4), RFLT, 'F'},
  72. {"F5", FP_REG(5), RFLT, 'F'},
  73. {"F6", FP_REG(6), RFLT, 'F'},
  74. {"F7", FP_REG(7), RFLT, 'F'},
  75. {"F8", FP_REG(8), RFLT, 'F'},
  76. {"F9", FP_REG(9), RFLT, 'F'},
  77. {"F10", FP_REG(10), RFLT, 'F'},
  78. {"F11", FP_REG(11), RFLT, 'F'},
  79. {"F12", FP_REG(12), RFLT, 'F'},
  80. {"F13", FP_REG(13), RFLT, 'F'},
  81. {"F14", FP_REG(14), RFLT, 'F'},
  82. {"F15", FP_REG(15), RFLT, 'F'},
  83. {"F16", FP_REG(16), RFLT, 'F'},
  84. {"F17", FP_REG(17), RFLT, 'F'},
  85. {"F18", FP_REG(18), RFLT, 'F'},
  86. {"F19", FP_REG(19), RFLT, 'F'},
  87. {"F20", FP_REG(20), RFLT, 'F'},
  88. {"F21", FP_REG(21), RFLT, 'F'},
  89. {"F22", FP_REG(22), RFLT, 'F'},
  90. {"F23", FP_REG(23), RFLT, 'F'},
  91. {"F24", FP_REG(24), RFLT, 'F'},
  92. {"F25", FP_REG(25), RFLT, 'F'},
  93. {"F26", FP_REG(26), RFLT, 'F'},
  94. {"F27", FP_REG(27), RFLT, 'F'},
  95. {"F28", FP_REG(28), RFLT, 'F'},
  96. {"F29", FP_REG(29), RFLT, 'F'},
  97. {"F30", FP_REG(30), RFLT, 'F'},
  98. {"F31", FP_REG(31), RFLT, 'F'},
  99. {"FPSCR", FP_REG(32)+4, RFLT, 'X'},
  100. { 0 }
  101. };
  102. /* the machine description */
  103. Mach mpower64 =
  104. {
  105. "power64",
  106. MPOWER64, /* machine type */
  107. power64reglist, /* register set */
  108. REGSIZE, /* number of bytes in register set */
  109. FPREGSIZE, /* number of bytes in FP register set */
  110. "PC", /* name of PC */
  111. "SP", /* name of SP */
  112. "LR", /* name of link register */
  113. "setSB", /* static base register name */
  114. 0, /* value */
  115. 0x100000, /* page size (TODO, too many choices) */
  116. 0xffffffff80000000ull, /* kernel base (TODO, likely incorrect) */
  117. 0xf000000000000000ull, /* kernel text mask (TODO, likely incorrect) */
  118. 0x00007ffffff00000ull, /* user stack top (TODO, likely incorrect) */
  119. 4, /* quantization of pc */
  120. 8, /* szaddr */
  121. 8, /* szreg */
  122. 4, /* szfloat */
  123. 8, /* szdouble */
  124. };
  125. #endif