8db.c 37 KB

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  1. #include <u.h>
  2. #include <libc.h>
  3. #include <bio.h>
  4. #include <mach.h>
  5. /*
  6. * i386-specific debugger interface
  7. */
  8. static char *i386excep(Map*, Rgetter);
  9. static int i386trace(Map*, ulong, ulong, ulong, Tracer);
  10. static ulong i386frame(Map*, ulong, ulong, ulong, ulong);
  11. static int i386foll(Map*, ulong, Rgetter, ulong*);
  12. static int i386inst(Map*, ulong, char, char*, int);
  13. static int i386das(Map*, ulong, char*, int);
  14. static int i386instlen(Map*, ulong);
  15. static char STARTSYM[] = "_main";
  16. static char PROFSYM[] = "_mainp";
  17. static char FRAMENAME[] = ".frame";
  18. static char *excname[] =
  19. {
  20. [0] "divide error",
  21. [1] "debug exception",
  22. [4] "overflow",
  23. [5] "bounds check",
  24. [6] "invalid opcode",
  25. [7] "math coprocessor emulation",
  26. [8] "double fault",
  27. [9] "math coprocessor overrun",
  28. [10] "invalid TSS",
  29. [11] "segment not present",
  30. [12] "stack exception",
  31. [13] "general protection violation",
  32. [14] "page fault",
  33. [16] "math coprocessor error",
  34. [24] "clock",
  35. [25] "keyboard",
  36. [27] "modem status",
  37. [28] "serial line status",
  38. [30] "floppy disk",
  39. [36] "mouse",
  40. [37] "math coprocessor",
  41. [38] "hard disk",
  42. [64] "system call",
  43. };
  44. Machdata i386mach =
  45. {
  46. {0xCC, 0, 0, 0}, /* break point: INT 3 */
  47. 1, /* break point size */
  48. leswab, /* convert short to local byte order */
  49. leswal, /* convert long to local byte order */
  50. leswav, /* convert vlong to local byte order */
  51. i386trace, /* C traceback */
  52. i386frame, /* frame finder */
  53. i386excep, /* print exception */
  54. 0, /* breakpoint fixup */
  55. leieeesftos, /* single precision float printer */
  56. leieeedftos, /* double precision float printer */
  57. i386foll, /* following addresses */
  58. i386inst, /* print instruction */
  59. i386das, /* dissembler */
  60. i386instlen, /* instruction size calculation */
  61. };
  62. static char*
  63. i386excep(Map *map, Rgetter rget)
  64. {
  65. ulong c;
  66. ulong pc;
  67. static char buf[16];
  68. c = (*rget)(map, "TRAP");
  69. if(c > 64 || excname[c] == 0) {
  70. if (c == 3) {
  71. pc = (*rget)(map, "PC");
  72. if (get1(map, pc, (uchar*)buf, machdata->bpsize) > 0)
  73. if (memcmp(buf, machdata->bpinst, machdata->bpsize) == 0)
  74. return "breakpoint";
  75. }
  76. sprint(buf, "exception %ld", c);
  77. return buf;
  78. } else
  79. return excname[c];
  80. }
  81. static int
  82. i386trace(Map *map, ulong pc, ulong sp, ulong link, Tracer trace)
  83. {
  84. int i;
  85. ulong osp;
  86. Symbol s, f;
  87. USED(link);
  88. i = 0;
  89. osp = 0;
  90. while(findsym(pc, CTEXT, &s)) {
  91. if (osp == sp)
  92. break;
  93. osp = sp;
  94. if(strcmp(STARTSYM, s.name) == 0 || strcmp(PROFSYM, s.name) == 0)
  95. break;
  96. if(pc != s.value) { /* not at first instruction */
  97. if(findlocal(&s, FRAMENAME, &f) == 0)
  98. break;
  99. sp += f.value-mach->szaddr;
  100. }
  101. if (get4(map, sp, (long *) &pc) < 0)
  102. break;
  103. if(pc == 0)
  104. break;
  105. (*trace)(map, pc, sp, &s);
  106. sp += mach->szaddr;
  107. if(++i > 1000)
  108. break;
  109. }
  110. return i;
  111. }
  112. static ulong
  113. i386frame(Map *map, ulong addr, ulong pc, ulong sp, ulong link)
  114. {
  115. Symbol s, f;
  116. USED(link);
  117. while (findsym(pc, CTEXT, &s)) {
  118. if(strcmp(STARTSYM, s.name) == 0 || strcmp(PROFSYM, s.name) == 0)
  119. break;
  120. if(pc != s.value) { /* not first instruction */
  121. if(findlocal(&s, FRAMENAME, &f) == 0)
  122. break;
  123. sp += f.value-mach->szaddr;
  124. }
  125. if (s.value == addr)
  126. return sp;
  127. if (get4(map, sp, (long *)&pc) < 0)
  128. break;
  129. sp += mach->szaddr;
  130. }
  131. return 0;
  132. }
  133. /* I386/486 - Disassembler and related functions */
  134. /*
  135. * an instruction
  136. */
  137. typedef struct Instr Instr;
  138. struct Instr
  139. {
  140. uchar mem[1+1+1+1+2+1+1+4+4]; /* raw instruction */
  141. ulong addr; /* address of start of instruction */
  142. int n; /* number of bytes in instruction */
  143. char *prefix; /* instr prefix */
  144. char *segment; /* segment override */
  145. uchar jumptype; /* set to the operand type for jump/ret/call */
  146. char osize; /* 'W' or 'L' */
  147. char asize; /* address size 'W' or 'L' */
  148. uchar mod; /* bits 6-7 of mod r/m field */
  149. uchar reg; /* bits 3-5 of mod r/m field */
  150. char ss; /* bits 6-7 of SIB */
  151. char index; /* bits 3-5 of SIB */
  152. char base; /* bits 0-2 of SIB */
  153. short seg; /* segment of far address */
  154. ulong disp; /* displacement */
  155. ulong imm; /* immediate */
  156. ulong imm2; /* second immediate operand */
  157. char *curr; /* fill level in output buffer */
  158. char *end; /* end of output buffer */
  159. char *err; /* error message */
  160. };
  161. /* 386 register (ha!) set */
  162. enum{
  163. AX=0,
  164. CX,
  165. DX,
  166. BX,
  167. SP,
  168. BP,
  169. SI,
  170. DI,
  171. };
  172. /* Operand Format codes */
  173. /*
  174. %A - address size register modifier (!asize -> 'E')
  175. %C - Control register CR0/CR1/CR2
  176. %D - Debug register DR0/DR1/DR2/DR3/DR6/DR7
  177. %I - second immediate operand
  178. %O - Operand size register modifier (!osize -> 'E')
  179. %T - Test register TR6/TR7
  180. %S - size code ('W' or 'L')
  181. %X - Weird opcode: OSIZE == 'W' => "CBW"; else => "CWDE"
  182. %d - displacement 16-32 bits
  183. %e - effective address - Mod R/M value
  184. %f - floating point register F0-F7 - from Mod R/M register
  185. %g - segment register
  186. %i - immediate operand 8-32 bits
  187. %p - PC-relative - signed displacement in immediate field
  188. %r - Reg from Mod R/M
  189. %x - Weird opcode: OSIZE == 'W' => "CWD"; else => "CDQ"
  190. */
  191. typedef struct Optable Optable;
  192. struct Optable
  193. {
  194. char operand[2];
  195. void *proto; /* actually either (char*) or (Optable*) */
  196. };
  197. /* Operand decoding codes */
  198. enum {
  199. Ib = 1, /* 8-bit immediate - (no sign extension)*/
  200. Ibs, /* 8-bit immediate (sign extended) */
  201. Jbs, /* 8-bit sign-extended immediate in jump or call */
  202. Iw, /* 16-bit immediate -> imm */
  203. Iw2, /* 16-bit immediate -> imm2 */
  204. Iwd, /* Operand-sized immediate (no sign extension)*/
  205. Awd, /* Address offset */
  206. Iwds, /* Operand-sized immediate (sign extended) */
  207. RM, /* Word or long R/M field with register (/r) */
  208. RMB, /* Byte R/M field with register (/r) */
  209. RMOP, /* Word or long R/M field with op code (/digit) */
  210. RMOPB, /* Byte R/M field with op code (/digit) */
  211. RMR, /* R/M register only (mod = 11) */
  212. RMM, /* R/M memory only (mod = 0/1/2) */
  213. R0, /* Base reg of Mod R/M is literal 0x00 */
  214. R1, /* Base reg of Mod R/M is literal 0x01 */
  215. FRMOP, /* Floating point R/M field with opcode */
  216. FRMEX, /* Extended floating point R/M field with opcode */
  217. JUMP, /* Jump or Call flag - no operand */
  218. RET, /* Return flag - no operand */
  219. OA, /* literal 0x0a byte */
  220. PTR, /* Seg:Displacement addr (ptr16:16 or ptr16:32) */
  221. AUX, /* Multi-byte op code - Auxiliary table */
  222. PRE, /* Instr Prefix */
  223. SEG, /* Segment Prefix */
  224. OPOVER, /* Operand size override */
  225. ADDOVER, /* Address size override */
  226. };
  227. static Optable optab0F00[8]=
  228. {
  229. [0x00] 0,0, "MOVW LDT,%e",
  230. [0x01] 0,0, "MOVW TR,%e",
  231. [0x02] 0,0, "MOVW %e,LDT",
  232. [0x03] 0,0, "MOVW %e,TR",
  233. [0x04] 0,0, "VERR %e",
  234. [0x05] 0,0, "VERW %e",
  235. };
  236. static Optable optab0F01[8]=
  237. {
  238. [0x00] 0,0, "MOVL GDTR,%e",
  239. [0x01] 0,0, "MOVL IDTR,%e",
  240. [0x02] 0,0, "MOVL %e,GDTR",
  241. [0x03] 0,0, "MOVL %e,IDTR",
  242. [0x04] 0,0, "MOVW MSW,%e", /* word */
  243. [0x06] 0,0, "MOVW %e,MSW", /* word */
  244. };
  245. static Optable optab0FBA[8]=
  246. {
  247. [0x04] Ib,0, "BT%S %i,%e",
  248. [0x05] Ib,0, "BTS%S %i,%e",
  249. [0x06] Ib,0, "BTR%S %i,%e",
  250. [0x07] Ib,0, "BTC%S %i,%e",
  251. };
  252. static Optable optab0F[256]=
  253. {
  254. [0x00] RMOP,0, optab0F00,
  255. [0x01] RMOP,0, optab0F01,
  256. [0x02] RM,0, "LAR %e,%r",
  257. [0x03] RM,0, "LSL %e,%r",
  258. [0x06] 0,0, "CLTS",
  259. [0x08] 0,0, "INVD",
  260. [0x09] 0,0, "WBINVD",
  261. [0x20] RMR,0, "MOVL %C,%e",
  262. [0x21] RMR,0, "MOVL %D,%e",
  263. [0x22] RMR,0, "MOVL %e,%C",
  264. [0x23] RMR,0, "MOVL %e,%D",
  265. [0x24] RMR,0, "MOVL %T,%e",
  266. [0x26] RMR,0, "MOVL %e,%T",
  267. [0x30] 0,0, "WRMSR",
  268. [0x31] 0,0, "RDTSC",
  269. [0x32] 0,0, "RDMSR",
  270. [0x42] RM,0, "CMOVC %e,%r", /* CF */
  271. [0x43] RM,0, "CMOVNC %e,%r", /* ¬ CF */
  272. [0x44] RM,0, "CMOVZ %e,%r", /* ZF */
  273. [0x45] RM,0, "CMOVNZ %e,%r", /* ¬ ZF */
  274. [0x46] RM,0, "CMOVBE %e,%r", /* CF ∨ ZF */
  275. [0x47] RM,0, "CMOVA %e,%r", /* ¬CF ∧ ¬ZF */
  276. [0x48] RM,0, "CMOVS %e,%r", /* SF */
  277. [0x49] RM,0, "CMOVNS %e,%r", /* ¬ SF */
  278. [0x4A] RM,0, "CMOVP %e,%r", /* PF */
  279. [0x4B] RM,0, "CMOVNP %e,%r", /* ¬ PF */
  280. [0x4C] RM,0, "CMOVLT %e,%r", /* LT ≡ OF ≠ SF */
  281. [0x4D] RM,0, "CMOVGE %e,%r", /* GE ≡ ZF ∨ SF */
  282. [0x4E] RM,0, "CMOVLE %e,%r", /* LE ≡ ZF ∨ LT */
  283. [0x4F] RM,0, "CMOVGT %e,%r", /* GT ≡ ¬ZF ∧ GE */
  284. [0x80] Iwds,0, "JOS %p",
  285. [0x81] Iwds,0, "JOC %p",
  286. [0x82] Iwds,0, "JCS %p",
  287. [0x83] Iwds,0, "JCC %p",
  288. [0x84] Iwds,0, "JEQ %p",
  289. [0x85] Iwds,0, "JNE %p",
  290. [0x86] Iwds,0, "JLS %p",
  291. [0x87] Iwds,0, "JHI %p",
  292. [0x88] Iwds,0, "JMI %p",
  293. [0x89] Iwds,0, "JPL %p",
  294. [0x8a] Iwds,0, "JPS %p",
  295. [0x8b] Iwds,0, "JPC %p",
  296. [0x8c] Iwds,0, "JLT %p",
  297. [0x8d] Iwds,0, "JGE %p",
  298. [0x8e] Iwds,0, "JLE %p",
  299. [0x8f] Iwds,0, "JGT %p",
  300. [0x90] RMB,0, "SETOS %e",
  301. [0x91] RMB,0, "SETOC %e",
  302. [0x92] RMB,0, "SETCS %e",
  303. [0x93] RMB,0, "SETCC %e",
  304. [0x94] RMB,0, "SETEQ %e",
  305. [0x95] RMB,0, "SETNE %e",
  306. [0x96] RMB,0, "SETLS %e",
  307. [0x97] RMB,0, "SETHI %e",
  308. [0x98] RMB,0, "SETMI %e",
  309. [0x99] RMB,0, "SETPL %e",
  310. [0x9a] RMB,0, "SETPS %e",
  311. [0x9b] RMB,0, "SETPC %e",
  312. [0x9c] RMB,0, "SETLT %e",
  313. [0x9d] RMB,0, "SETGE %e",
  314. [0x9e] RMB,0, "SETLE %e",
  315. [0x9f] RMB,0, "SETGT %e",
  316. [0xa0] 0,0, "PUSHL FS",
  317. [0xa1] 0,0, "POPL FS",
  318. [0xa2] 0,0, "CPUID",
  319. [0xa3] RM,0, "BT%S %r,%e",
  320. [0xa4] RM,Ib, "SHLD%S %r,%i,%e",
  321. [0xa5] RM,0, "SHLD%S %r,CL,%e",
  322. [0xa8] 0,0, "PUSHL GS",
  323. [0xa9] 0,0, "POPL GS",
  324. [0xab] RM,0, "BTS%S %r,%e",
  325. [0xac] RM,Ib, "SHRD%S %r,%i,%e",
  326. [0xad] RM,0, "SHRD%S %r,CL,%e",
  327. [0xaf] RM,0, "IMUL%S %e,%r",
  328. [0xb2] RMM,0, "LSS %e,%r",
  329. [0xb3] RM,0, "BTR%S %r,%e",
  330. [0xb4] RMM,0, "LFS %e,%r",
  331. [0xb5] RMM,0, "LGS %e,%r",
  332. [0xb6] RMB,0, "MOVBZX %e,%R",
  333. [0xb7] RM,0, "MOVWZX %e,%R",
  334. [0xba] RMOP,0, optab0FBA,
  335. [0xbb] RM,0, "BTC%S %e,%r",
  336. [0xbc] RM,0, "BSF%S %e,%r",
  337. [0xbd] RM,0, "BSR%S %e,%r",
  338. [0xbe] RMB,0, "MOVBSX %e,%R",
  339. [0xbf] RM,0, "MOVWSX %e,%R",
  340. };
  341. static Optable optab80[8]=
  342. {
  343. [0x00] Ib,0, "ADDB %i,%e",
  344. [0x01] Ib,0, "ORB %i,%e",
  345. [0x02] Ib,0, "ADCB %i,%e",
  346. [0x03] Ib,0, "SBBB %i,%e",
  347. [0x04] Ib,0, "ANDB %i,%e",
  348. [0x05] Ib,0, "SUBB %i,%e",
  349. [0x06] Ib,0, "XORB %i,%e",
  350. [0x07] Ib,0, "CMPB %e,%i",
  351. };
  352. static Optable optab81[8]=
  353. {
  354. [0x00] Iwd,0, "ADD%S %i,%e",
  355. [0x01] Iwd,0, "OR%S %i,%e",
  356. [0x02] Iwd,0, "ADC%S %i,%e",
  357. [0x03] Iwd,0, "SBB%S %i,%e",
  358. [0x04] Iwd,0, "AND%S %i,%e",
  359. [0x05] Iwd,0, "SUB%S %i,%e",
  360. [0x06] Iwd,0, "XOR%S %i,%e",
  361. [0x07] Iwd,0, "CMP%S %e,%i",
  362. };
  363. static Optable optab83[8]=
  364. {
  365. [0x00] Ibs,0, "ADD%S %i,%e",
  366. [0x01] Ibs,0, "OR%S %i,%e",
  367. [0x02] Ibs,0, "ADC%S %i,%e",
  368. [0x03] Ibs,0, "SBB%S %i,%e",
  369. [0x04] Ibs,0, "AND%S %i,%e",
  370. [0x05] Ibs,0, "SUB%S %i,%e",
  371. [0x06] Ibs,0, "XOR%S %i,%e",
  372. [0x07] Ibs,0, "CMP%S %e,%i",
  373. };
  374. static Optable optabC0[8] =
  375. {
  376. [0x00] Ib,0, "ROLB %i,%e",
  377. [0x01] Ib,0, "RORB %i,%e",
  378. [0x02] Ib,0, "RCLB %i,%e",
  379. [0x03] Ib,0, "RCRB %i,%e",
  380. [0x04] Ib,0, "SHLB %i,%e",
  381. [0x05] Ib,0, "SHRB %i,%e",
  382. [0x07] Ib,0, "SARB %i,%e",
  383. };
  384. static Optable optabC1[8] =
  385. {
  386. [0x00] Ib,0, "ROL%S %i,%e",
  387. [0x01] Ib,0, "ROR%S %i,%e",
  388. [0x02] Ib,0, "RCL%S %i,%e",
  389. [0x03] Ib,0, "RCR%S %i,%e",
  390. [0x04] Ib,0, "SHL%S %i,%e",
  391. [0x05] Ib,0, "SHR%S %i,%e",
  392. [0x07] Ib,0, "SAR%S %i,%e",
  393. };
  394. static Optable optabD0[8] =
  395. {
  396. [0x00] 0,0, "ROLB %e",
  397. [0x01] 0,0, "RORB %e",
  398. [0x02] 0,0, "RCLB %e",
  399. [0x03] 0,0, "RCRB %e",
  400. [0x04] 0,0, "SHLB %e",
  401. [0x05] 0,0, "SHRB %e",
  402. [0x07] 0,0, "SARB %e",
  403. };
  404. static Optable optabD1[8] =
  405. {
  406. [0x00] 0,0, "ROL%S %e",
  407. [0x01] 0,0, "ROR%S %e",
  408. [0x02] 0,0, "RCL%S %e",
  409. [0x03] 0,0, "RCR%S %e",
  410. [0x04] 0,0, "SHL%S %e",
  411. [0x05] 0,0, "SHR%S %e",
  412. [0x07] 0,0, "SAR%S %e",
  413. };
  414. static Optable optabD2[8] =
  415. {
  416. [0x00] 0,0, "ROLB CL,%e",
  417. [0x01] 0,0, "RORB CL,%e",
  418. [0x02] 0,0, "RCLB CL,%e",
  419. [0x03] 0,0, "RCRB CL,%e",
  420. [0x04] 0,0, "SHLB CL,%e",
  421. [0x05] 0,0, "SHRB CL,%e",
  422. [0x07] 0,0, "SARB CL,%e",
  423. };
  424. static Optable optabD3[8] =
  425. {
  426. [0x00] 0,0, "ROL%S CL,%e",
  427. [0x01] 0,0, "ROR%S CL,%e",
  428. [0x02] 0,0, "RCL%S CL,%e",
  429. [0x03] 0,0, "RCR%S CL,%e",
  430. [0x04] 0,0, "SHL%S CL,%e",
  431. [0x05] 0,0, "SHR%S CL,%e",
  432. [0x07] 0,0, "SAR%S CL,%e",
  433. };
  434. static Optable optabD8[8+8] =
  435. {
  436. [0x00] 0,0, "FADDF %e,F0",
  437. [0x01] 0,0, "FMULF %e,F0",
  438. [0x02] 0,0, "FCOMF %e,F0",
  439. [0x03] 0,0, "FCOMFP %e,F0",
  440. [0x04] 0,0, "FSUBF %e,F0",
  441. [0x05] 0,0, "FSUBRF %e,F0",
  442. [0x06] 0,0, "FDIVF %e,F0",
  443. [0x07] 0,0, "FDIVRF %e,F0",
  444. [0x08] 0,0, "FADDD %f,F0",
  445. [0x09] 0,0, "FMULD %f,F0",
  446. [0x0a] 0,0, "FCOMD %f,F0",
  447. [0x0b] 0,0, "FCOMPD %f,F0",
  448. [0x0c] 0,0, "FSUBD %f,F0",
  449. [0x0d] 0,0, "FSUBRD %f,F0",
  450. [0x0e] 0,0, "FDIVD %f,F0",
  451. [0x0f] 0,0, "FDIVRD %f,F0",
  452. };
  453. /*
  454. * optabD9 and optabDB use the following encoding:
  455. * if (0 <= modrm <= 2) instruction = optabDx[modrm&0x07];
  456. * else instruction = optabDx[(modrm&0x3f)+8];
  457. *
  458. * the instructions for MOD == 3, follow the 8 instructions
  459. * for the other MOD values stored at the front of the table.
  460. */
  461. static Optable optabD9[64+8] =
  462. {
  463. [0x00] 0,0, "FMOVF %e,F0",
  464. [0x02] 0,0, "FMOVF F0,%e",
  465. [0x03] 0,0, "FMOVFP F0,%e",
  466. [0x04] 0,0, "FLDENV%S %e",
  467. [0x05] 0,0, "FLDCW %e",
  468. [0x06] 0,0, "FSTENV%S %e",
  469. [0x07] 0,0, "FSTCW %e",
  470. [0x08] 0,0, "FMOVD F0,F0", /* Mod R/M = 11xx xxxx*/
  471. [0x09] 0,0, "FMOVD F1,F0",
  472. [0x0a] 0,0, "FMOVD F2,F0",
  473. [0x0b] 0,0, "FMOVD F3,F0",
  474. [0x0c] 0,0, "FMOVD F4,F0",
  475. [0x0d] 0,0, "FMOVD F5,F0",
  476. [0x0e] 0,0, "FMOVD F6,F0",
  477. [0x0f] 0,0, "FMOVD F7,F0",
  478. [0x10] 0,0, "FXCHD F0,F0",
  479. [0x11] 0,0, "FXCHD F1,F0",
  480. [0x12] 0,0, "FXCHD F2,F0",
  481. [0x13] 0,0, "FXCHD F3,F0",
  482. [0x14] 0,0, "FXCHD F4,F0",
  483. [0x15] 0,0, "FXCHD F5,F0",
  484. [0x16] 0,0, "FXCHD F6,F0",
  485. [0x17] 0,0, "FXCHD F7,F0",
  486. [0x18] 0,0, "FNOP",
  487. [0x28] 0,0, "FCHS",
  488. [0x29] 0,0, "FABS",
  489. [0x2c] 0,0, "FTST",
  490. [0x2d] 0,0, "FXAM",
  491. [0x30] 0,0, "FLD1",
  492. [0x31] 0,0, "FLDL2T",
  493. [0x32] 0,0, "FLDL2E",
  494. [0x33] 0,0, "FLDPI",
  495. [0x34] 0,0, "FLDLG2",
  496. [0x35] 0,0, "FLDLN2",
  497. [0x36] 0,0, "FLDZ",
  498. [0x38] 0,0, "F2XM1",
  499. [0x39] 0,0, "FYL2X",
  500. [0x3a] 0,0, "FPTAN",
  501. [0x3b] 0,0, "FPATAN",
  502. [0x3c] 0,0, "FXTRACT",
  503. [0x3d] 0,0, "FPREM1",
  504. [0x3e] 0,0, "FDECSTP",
  505. [0x3f] 0,0, "FNCSTP",
  506. [0x40] 0,0, "FPREM",
  507. [0x41] 0,0, "FYL2XP1",
  508. [0x42] 0,0, "FSQRT",
  509. [0x43] 0,0, "FSINCOS",
  510. [0x44] 0,0, "FRNDINT",
  511. [0x45] 0,0, "FSCALE",
  512. [0x46] 0,0, "FSIN",
  513. [0x47] 0,0, "FCOS",
  514. };
  515. static Optable optabDA[8+8] =
  516. {
  517. [0x00] 0,0, "FADDL %e,F0",
  518. [0x01] 0,0, "FMULL %e,F0",
  519. [0x02] 0,0, "FCOML %e,F0",
  520. [0x03] 0,0, "FCOMLP %e,F0",
  521. [0x04] 0,0, "FSUBL %e,F0",
  522. [0x05] 0,0, "FSUBRL %e,F0",
  523. [0x06] 0,0, "FDIVL %e,F0",
  524. [0x07] 0,0, "FDIVRL %e,F0",
  525. [0x0d] R1,0, "FUCOMPP",
  526. };
  527. static Optable optabDB[8+64] =
  528. {
  529. [0x00] 0,0, "FMOVL %e,F0",
  530. [0x02] 0,0, "FMOVL F0,%e",
  531. [0x03] 0,0, "FMOVLP F0,%e",
  532. [0x05] 0,0, "FMOVX %e,F0",
  533. [0x07] 0,0, "FMOVXP F0,%e",
  534. [0x2a] 0,0, "FCLEX",
  535. [0x2b] 0,0, "FINIT",
  536. };
  537. static Optable optabDC[8+8] =
  538. {
  539. [0x00] 0,0, "FADDD %e,F0",
  540. [0x01] 0,0, "FMULD %e,F0",
  541. [0x02] 0,0, "FCOMD %e,F0",
  542. [0x03] 0,0, "FCOMDP %e,F0",
  543. [0x04] 0,0, "FSUBD %e,F0",
  544. [0x05] 0,0, "FSUBRD %e,F0",
  545. [0x06] 0,0, "FDIVD %e,F0",
  546. [0x07] 0,0, "FDIVRD %e,F0",
  547. [0x08] 0,0, "FADDD F0,%f",
  548. [0x09] 0,0, "FMULD F0,%f",
  549. [0x0c] 0,0, "FSUBRD F0,%f",
  550. [0x0d] 0,0, "FSUBD F0,%f",
  551. [0x0e] 0,0, "FDIVRD F0,%f",
  552. [0x0f] 0,0, "FDIVD F0,%f",
  553. };
  554. static Optable optabDD[8+8] =
  555. {
  556. [0x00] 0,0, "FMOVD %e,F0",
  557. [0x02] 0,0, "FMOVD F0,%e",
  558. [0x03] 0,0, "FMOVDP F0,%e",
  559. [0x04] 0,0, "FRSTOR%S %e",
  560. [0x06] 0,0, "FSAVE%S %e",
  561. [0x07] 0,0, "FSTSW %e",
  562. [0x08] 0,0, "FFREED %f",
  563. [0x0a] 0,0, "FMOVD %f,F0",
  564. [0x0b] 0,0, "FMOVDP %f,F0",
  565. [0x0c] 0,0, "FUCOMD %f,F0",
  566. [0x0d] 0,0, "FUCOMDP %f,F0",
  567. };
  568. static Optable optabDE[8+8] =
  569. {
  570. [0x00] 0,0, "FADDW %e,F0",
  571. [0x01] 0,0, "FMULW %e,F0",
  572. [0x02] 0,0, "FCOMW %e,F0",
  573. [0x03] 0,0, "FCOMWP %e,F0",
  574. [0x04] 0,0, "FSUBW %e,F0",
  575. [0x05] 0,0, "FSUBRW %e,F0",
  576. [0x06] 0,0, "FDIVW %e,F0",
  577. [0x07] 0,0, "FDIVRW %e,F0",
  578. [0x08] 0,0, "FADDDP F0,%f",
  579. [0x09] 0,0, "FMULDP F0,%f",
  580. [0x0b] R1,0, "FCOMPDP",
  581. [0x0c] 0,0, "FSUBRDP F0,%f",
  582. [0x0d] 0,0, "FSUBDP F0,%f",
  583. [0x0e] 0,0, "FDIVRDP F0,%f",
  584. [0x0f] 0,0, "FDIVDP F0,%f",
  585. };
  586. static Optable optabDF[8+8] =
  587. {
  588. [0x00] 0,0, "FMOVW %e,F0",
  589. [0x02] 0,0, "FMOVW F0,%e",
  590. [0x03] 0,0, "FMOVWP F0,%e",
  591. [0x04] 0,0, "FBLD %e",
  592. [0x05] 0,0, "FMOVL %e,F0",
  593. [0x06] 0,0, "FBSTP %e",
  594. [0x07] 0,0, "FMOVLP F0,%e",
  595. [0x0c] R0,0, "FSTSW %OAX",
  596. };
  597. static Optable optabF6[8] =
  598. {
  599. [0x00] Ib,0, "TESTB %i,%e",
  600. [0x02] 0,0, "NOTB %e",
  601. [0x03] 0,0, "NEGB %e",
  602. [0x04] 0,0, "MULB AL,%e",
  603. [0x05] 0,0, "IMULB AL,%e",
  604. [0x06] 0,0, "DIVB AL,%e",
  605. [0x07] 0,0, "IDIVB AL,%e",
  606. };
  607. static Optable optabF7[8] =
  608. {
  609. [0x00] Iwd,0, "TEST%S %i,%e",
  610. [0x02] 0,0, "NOT%S %e",
  611. [0x03] 0,0, "NEG%S %e",
  612. [0x04] 0,0, "MUL%S %OAX,%e",
  613. [0x05] 0,0, "IMUL%S %OAX,%e",
  614. [0x06] 0,0, "DIV%S %OAX,%e",
  615. [0x07] 0,0, "IDIV%S %OAX,%e",
  616. };
  617. static Optable optabFE[8] =
  618. {
  619. [0x00] 0,0, "INCB %e",
  620. [0x01] 0,0, "DECB %e",
  621. };
  622. static Optable optabFF[8] =
  623. {
  624. [0x00] 0,0, "INC%S %e",
  625. [0x01] 0,0, "DEC%S %e",
  626. [0x02] JUMP,0, "CALL* %e",
  627. [0x03] JUMP,0, "CALLF* %e",
  628. [0x04] JUMP,0, "JMP* %e",
  629. [0x05] JUMP,0, "JMPF* %e",
  630. [0x06] 0,0, "PUSHL %e",
  631. };
  632. static Optable optable[256] =
  633. {
  634. [0x00] RMB,0, "ADDB %r,%e",
  635. [0x01] RM,0, "ADD%S %r,%e",
  636. [0x02] RMB,0, "ADDB %e,%r",
  637. [0x03] RM,0, "ADD%S %e,%r",
  638. [0x04] Ib,0, "ADDB %i,AL",
  639. [0x05] Iwd,0, "ADD%S %i,%OAX",
  640. [0x06] 0,0, "PUSHL ES",
  641. [0x07] 0,0, "POPL ES",
  642. [0x08] RMB,0, "ORB %r,%e",
  643. [0x09] RM,0, "OR%S %r,%e",
  644. [0x0a] RMB,0, "ORB %e,%r",
  645. [0x0b] RM,0, "OR%S %e,%r",
  646. [0x0c] Ib,0, "ORB %i,AL",
  647. [0x0d] Iwd,0, "OR%S %i,%OAX",
  648. [0x0e] 0,0, "PUSHL CS",
  649. [0x0f] AUX,0, optab0F,
  650. [0x10] RMB,0, "ADCB %r,%e",
  651. [0x11] RM,0, "ADC%S %r,%e",
  652. [0x12] RMB,0, "ADCB %e,%r",
  653. [0x13] RM,0, "ADC%S %e,%r",
  654. [0x14] Ib,0, "ADCB %i,AL",
  655. [0x15] Iwd,0, "ADC%S %i,%OAX",
  656. [0x16] 0,0, "PUSHL SS",
  657. [0x17] 0,0, "POPL SS",
  658. [0x18] RMB,0, "SBBB %r,%e",
  659. [0x19] RM,0, "SBB%S %r,%e",
  660. [0x1a] RMB,0, "SBBB %e,%r",
  661. [0x1b] RM,0, "SBB%S %e,%r",
  662. [0x1c] Ib,0, "SBBB %i,AL",
  663. [0x1d] Iwd,0, "SBB%S %i,%OAX",
  664. [0x1e] 0,0, "PUSHL DS",
  665. [0x1f] 0,0, "POPL DS",
  666. [0x20] RMB,0, "ANDB %r,%e",
  667. [0x21] RM,0, "AND%S %r,%e",
  668. [0x22] RMB,0, "ANDB %e,%r",
  669. [0x23] RM,0, "AND%S %e,%r",
  670. [0x24] Ib,0, "ANDB %i,AL",
  671. [0x25] Iwd,0, "AND%S %i,%OAX",
  672. [0x26] SEG,0, "ES:",
  673. [0x27] 0,0, "DAA",
  674. [0x28] RMB,0, "SUBB %r,%e",
  675. [0x29] RM,0, "SUB%S %r,%e",
  676. [0x2a] RMB,0, "SUBB %e,%r",
  677. [0x2b] RM,0, "SUB%S %e,%r",
  678. [0x2c] Ib,0, "SUBB %i,AL",
  679. [0x2d] Iwd,0, "SUB%S %i,%OAX",
  680. [0x2e] SEG,0, "CS:",
  681. [0x2f] 0,0, "DAS",
  682. [0x30] RMB,0, "XORB %r,%e",
  683. [0x31] RM,0, "XOR%S %r,%e",
  684. [0x32] RMB,0, "XORB %e,%r",
  685. [0x33] RM,0, "XOR%S %e,%r",
  686. [0x34] Ib,0, "XORB %i,AL",
  687. [0x35] Iwd,0, "XOR%S %i,%OAX",
  688. [0x36] SEG,0, "SS:",
  689. [0x37] 0,0, "AAA",
  690. [0x38] RMB,0, "CMPB %r,%e",
  691. [0x39] RM,0, "CMP%S %r,%e",
  692. [0x3a] RMB,0, "CMPB %e,%r",
  693. [0x3b] RM,0, "CMP%S %e,%r",
  694. [0x3c] Ib,0, "CMPB %i,AL",
  695. [0x3d] Iwd,0, "CMP%S %i,%OAX",
  696. [0x3e] SEG,0, "DS:",
  697. [0x3f] 0,0, "AAS",
  698. [0x40] 0,0, "INC%S %OAX",
  699. [0x41] 0,0, "INC%S %OCX",
  700. [0x42] 0,0, "INC%S %ODX",
  701. [0x43] 0,0, "INC%S %OBX",
  702. [0x44] 0,0, "INC%S %OSP",
  703. [0x45] 0,0, "INC%S %OBP",
  704. [0x46] 0,0, "INC%S %OSI",
  705. [0x47] 0,0, "INC%S %ODI",
  706. [0x48] 0,0, "DEC%S %OAX",
  707. [0x49] 0,0, "DEC%S %OCX",
  708. [0x4a] 0,0, "DEC%S %ODX",
  709. [0x4b] 0,0, "DEC%S %OBX",
  710. [0x4c] 0,0, "DEC%S %OSP",
  711. [0x4d] 0,0, "DEC%S %OBP",
  712. [0x4e] 0,0, "DEC%S %OSI",
  713. [0x4f] 0,0, "DEC%S %ODI",
  714. [0x50] 0,0, "PUSH%S %OAX",
  715. [0x51] 0,0, "PUSH%S %OCX",
  716. [0x52] 0,0, "PUSH%S %ODX",
  717. [0x53] 0,0, "PUSH%S %OBX",
  718. [0x54] 0,0, "PUSH%S %OSP",
  719. [0x55] 0,0, "PUSH%S %OBP",
  720. [0x56] 0,0, "PUSH%S %OSI",
  721. [0x57] 0,0, "PUSH%S %ODI",
  722. [0x58] 0,0, "POP%S %OAX",
  723. [0x59] 0,0, "POP%S %OCX",
  724. [0x5a] 0,0, "POP%S %ODX",
  725. [0x5b] 0,0, "POP%S %OBX",
  726. [0x5c] 0,0, "POP%S %OSP",
  727. [0x5d] 0,0, "POP%S %OBP",
  728. [0x5e] 0,0, "POP%S %OSI",
  729. [0x5f] 0,0, "POP%S %ODI",
  730. [0x60] 0,0, "PUSHA%S",
  731. [0x61] 0,0, "POPA%S",
  732. [0x62] RMM,0, "BOUND %e,%r",
  733. [0x63] RM,0, "ARPL %r,%e",
  734. [0x64] SEG,0, "FS:",
  735. [0x65] SEG,0, "GS:",
  736. [0x66] OPOVER,0, "",
  737. [0x67] ADDOVER,0, "",
  738. [0x68] Iwd,0, "PUSH%S %i",
  739. [0x69] RM,Iwd, "IMUL%S %e,%i,%r",
  740. [0x6a] Ib,0, "PUSH%S %i",
  741. [0x6b] RM,Ibs, "IMUL%S %e,%i,%r",
  742. [0x6c] 0,0, "INSB DX,(%ODI)",
  743. [0x6d] 0,0, "INS%S DX,(%ODI)",
  744. [0x6e] 0,0, "OUTSB (%ASI),DX",
  745. [0x6f] 0,0, "OUTS%S (%ASI),DX",
  746. [0x70] Jbs,0, "JOS %p",
  747. [0x71] Jbs,0, "JOC %p",
  748. [0x72] Jbs,0, "JCS %p",
  749. [0x73] Jbs,0, "JCC %p",
  750. [0x74] Jbs,0, "JEQ %p",
  751. [0x75] Jbs,0, "JNE %p",
  752. [0x76] Jbs,0, "JLS %p",
  753. [0x77] Jbs,0, "JHI %p",
  754. [0x78] Jbs,0, "JMI %p",
  755. [0x79] Jbs,0, "JPL %p",
  756. [0x7a] Jbs,0, "JPS %p",
  757. [0x7b] Jbs,0, "JPC %p",
  758. [0x7c] Jbs,0, "JLT %p",
  759. [0x7d] Jbs,0, "JGE %p",
  760. [0x7e] Jbs,0, "JLE %p",
  761. [0x7f] Jbs,0, "JGT %p",
  762. [0x80] RMOPB,0, optab80,
  763. [0x81] RMOP,0, optab81,
  764. [0x83] RMOP,0, optab83,
  765. [0x84] RMB,0, "TESTB %r,%e",
  766. [0x85] RM,0, "TEST%S %r,%e",
  767. [0x86] RMB,0, "XCHGB %r,%e",
  768. [0x87] RM,0, "XCHG%S %r,%e",
  769. [0x88] RMB,0, "MOVB %r,%e",
  770. [0x89] RM,0, "MOV%S %r,%e",
  771. [0x8a] RMB,0, "MOVB %e,%r",
  772. [0x8b] RM,0, "MOV%S %e,%r",
  773. [0x8c] RM,0, "MOVW %g,%e",
  774. [0x8d] RM,0, "LEA %e,%r",
  775. [0x8e] RM,0, "MOVW %e,%g",
  776. [0x8f] RM,0, "POP%S %e",
  777. [0x90] 0,0, "NOP",
  778. [0x91] 0,0, "XCHG %OCX,%OAX",
  779. [0x92] 0,0, "XCHG %ODX,%OAX",
  780. [0x93] 0,0, "XCHG %OBX,%OAX",
  781. [0x94] 0,0, "XCHG %OSP,%OAX",
  782. [0x95] 0,0, "XCHG %OBP,%OAX",
  783. [0x96] 0,0, "XCHG %OSI,%OAX",
  784. [0x97] 0,0, "XCHG %ODI,%OAX",
  785. [0x98] 0,0, "%X", /* miserable CBW or CWDE */
  786. [0x99] 0,0, "%x", /* idiotic CWD or CDQ */
  787. [0x9a] PTR,0, "CALL%S %d",
  788. [0x9b] 0,0, "WAIT",
  789. [0x9c] 0,0, "PUSHF",
  790. [0x9d] 0,0, "POPF",
  791. [0x9e] 0,0, "SAHF",
  792. [0x9f] 0,0, "LAHF",
  793. [0xa0] Awd,0, "MOVB %i,AL",
  794. [0xa1] Awd,0, "MOV%S %i,%OAX",
  795. [0xa2] Awd,0, "MOVB AL,%i",
  796. [0xa3] Awd,0, "MOV%S %OAX,%i",
  797. [0xa4] 0,0, "MOVSB (%ASI),(%ADI)",
  798. [0xa5] 0,0, "MOVS%S (%ASI),(%ADI)",
  799. [0xa6] 0,0, "CMPSB (%ASI),(%ADI)",
  800. [0xa7] 0,0, "CMPS%S (%ASI),(%ADI)",
  801. [0xa8] Ib,0, "TESTB %i,AL",
  802. [0xa9] Iwd,0, "TEST%S %i,%OAX",
  803. [0xaa] 0,0, "STOSB AL,(%ADI)",
  804. [0xab] 0,0, "STOS%S %OAX,(%ADI)",
  805. [0xac] 0,0, "LODSB (%ASI),AL",
  806. [0xad] 0,0, "LODS%S (%ASI),%OAX",
  807. [0xae] 0,0, "SCASB (%ADI),AL",
  808. [0xaf] 0,0, "SCAS%S (%ADI),%OAX",
  809. [0xb0] Ib,0, "MOVB %i,AL",
  810. [0xb1] Ib,0, "MOVB %i,CL",
  811. [0xb2] Ib,0, "MOVB %i,DL",
  812. [0xb3] Ib,0, "MOVB %i,BL",
  813. [0xb4] Ib,0, "MOVB %i,AH",
  814. [0xb5] Ib,0, "MOVB %i,CH",
  815. [0xb6] Ib,0, "MOVB %i,DH",
  816. [0xb7] Ib,0, "MOVB %i,BH",
  817. [0xb8] Iwd,0, "MOV%S %i,%OAX",
  818. [0xb9] Iwd,0, "MOV%S %i,%OCX",
  819. [0xba] Iwd,0, "MOV%S %i,%ODX",
  820. [0xbb] Iwd,0, "MOV%S %i,%OBX",
  821. [0xbc] Iwd,0, "MOV%S %i,%OSP",
  822. [0xbd] Iwd,0, "MOV%S %i,%OBP",
  823. [0xbe] Iwd,0, "MOV%S %i,%OSI",
  824. [0xbf] Iwd,0, "MOV%S %i,%ODI",
  825. [0xc0] RMOPB,0, optabC0,
  826. [0xc1] RMOP,0, optabC1,
  827. [0xc2] Iw,0, "RET %i",
  828. [0xc3] RET,0, "RET",
  829. [0xc4] RM,0, "LES %e,%r",
  830. [0xc5] RM,0, "LDS %e,%r",
  831. [0xc6] RMB,Ib, "MOVB %i,%e",
  832. [0xc7] RM,Iwd, "MOV%S %i,%e",
  833. [0xc8] Iw2,Ib, "ENTER %i,%I", /* loony ENTER */
  834. [0xc9] RET,0, "LEAVE", /* bizarre LEAVE */
  835. [0xca] Iw,0, "RETF %i",
  836. [0xcb] RET,0, "RETF",
  837. [0xcc] 0,0, "INT 3",
  838. [0xcd] Ib,0, "INTB %i",
  839. [0xce] 0,0, "INTO",
  840. [0xcf] 0,0, "IRET",
  841. [0xd0] RMOPB,0, optabD0,
  842. [0xd1] RMOP,0, optabD1,
  843. [0xd2] RMOPB,0, optabD2,
  844. [0xd3] RMOP,0, optabD3,
  845. [0xd4] OA,0, "AAM",
  846. [0xd5] OA,0, "AAD",
  847. [0xd7] 0,0, "XLAT",
  848. [0xd8] FRMOP,0, optabD8,
  849. [0xd9] FRMEX,0, optabD9,
  850. [0xda] FRMOP,0, optabDA,
  851. [0xdb] FRMEX,0, optabDB,
  852. [0xdc] FRMOP,0, optabDC,
  853. [0xdd] FRMOP,0, optabDD,
  854. [0xde] FRMOP,0, optabDE,
  855. [0xdf] FRMOP,0, optabDF,
  856. [0xe0] Jbs,0, "LOOPNE %p",
  857. [0xe1] Jbs,0, "LOOPE %p",
  858. [0xe2] Jbs,0, "LOOP %p",
  859. [0xe3] Jbs,0, "JCXZ %p",
  860. [0xe4] Ib,0, "INB %i,AL",
  861. [0xe5] Ib,0, "IN%S %i,%OAX",
  862. [0xe6] Ib,0, "OUTB AL,%i",
  863. [0xe7] Ib,0, "OUT%S %OAX,%i",
  864. [0xe8] Iwds,0, "CALL %p",
  865. [0xe9] Iwds,0, "JMP %p",
  866. [0xea] PTR,0, "JMP %d",
  867. [0xeb] Jbs,0, "JMP %p",
  868. [0xec] 0,0, "INB DX,AL",
  869. [0xed] 0,0, "IN%S DX,%OAX",
  870. [0xee] 0,0, "OUTB AL,DX",
  871. [0xef] 0,0, "OUT%S %OAX,DX",
  872. [0xf0] PRE,0, "LOCK",
  873. [0xf2] PRE,0, "REPNE",
  874. [0xf3] PRE,0, "REP",
  875. [0xf4] 0,0, "HALT",
  876. [0xf5] 0,0, "CMC",
  877. [0xf6] RMOPB,0, optabF6,
  878. [0xf7] RMOP,0, optabF7,
  879. [0xf8] 0,0, "CLC",
  880. [0xf9] 0,0, "STC",
  881. [0xfa] 0,0, "CLI",
  882. [0xfb] 0,0, "STI",
  883. [0xfc] 0,0, "CLD",
  884. [0xfd] 0,0, "STD",
  885. [0xfe] RMOPB,0, optabFE,
  886. [0xff] RMOP,0, optabFF,
  887. };
  888. /*
  889. * get a byte of the instruction
  890. */
  891. static int
  892. igetc(Map * map, Instr *ip, uchar *c)
  893. {
  894. if(ip->n+1 > sizeof(ip->mem)){
  895. werrstr("instruction too long");
  896. return -1;
  897. }
  898. if (get1(map, ip->addr+ip->n, c, 1) < 0) {
  899. werrstr("can't read instruction: %r");
  900. return -1;
  901. }
  902. ip->mem[ip->n++] = *c;
  903. return 1;
  904. }
  905. /*
  906. * get two bytes of the instruction
  907. */
  908. static int
  909. igets(Map *map, Instr *ip, ushort *sp)
  910. {
  911. uchar c;
  912. ushort s;
  913. if (igetc(map, ip, &c) < 0)
  914. return -1;
  915. s = c;
  916. if (igetc(map, ip, &c) < 0)
  917. return -1;
  918. s |= (c<<8);
  919. *sp = s;
  920. return 1;
  921. }
  922. /*
  923. * get 4 bytes of the instruction
  924. */
  925. static int
  926. igetl(Map *map, Instr *ip, ulong *lp)
  927. {
  928. ushort s;
  929. long l;
  930. if (igets(map, ip, &s) < 0)
  931. return -1;
  932. l = s;
  933. if (igets(map, ip, &s) < 0)
  934. return -1;
  935. l |= (s<<16);
  936. *lp = l;
  937. return 1;
  938. }
  939. static int
  940. getdisp(Map *map, Instr *ip, int mod, int rm, int code)
  941. {
  942. uchar c;
  943. ushort s;
  944. if (mod > 2)
  945. return 1;
  946. if (mod == 1) {
  947. if (igetc(map, ip, &c) < 0)
  948. return -1;
  949. if (c&0x80)
  950. ip->disp = c|0xffffff00;
  951. else
  952. ip->disp = c&0xff;
  953. } else if (mod == 2 || rm == code) {
  954. if (ip->asize == 'E') {
  955. if (igetl(map, ip, &ip->disp) < 0)
  956. return -1;
  957. } else {
  958. if (igets(map, ip, &s) < 0)
  959. return -1;
  960. if (s&0x8000)
  961. ip->disp = s|0xffff0000;
  962. else
  963. ip->disp = s;
  964. }
  965. if (mod == 0)
  966. ip->base = -1;
  967. }
  968. return 1;
  969. }
  970. static int
  971. modrm(Map *map, Instr *ip, uchar c)
  972. {
  973. uchar rm, mod;
  974. mod = (c>>6)&3;
  975. rm = c&7;
  976. ip->mod = mod;
  977. ip->base = rm;
  978. ip->reg = (c>>3)&7;
  979. if (mod == 3) /* register */
  980. return 1;
  981. if (ip->asize == 0) { /* 16-bit mode */
  982. switch(rm)
  983. {
  984. case 0:
  985. ip->base = BX; ip->index = SI;
  986. break;
  987. case 1:
  988. ip->base = BX; ip->index = DI;
  989. break;
  990. case 2:
  991. ip->base = BP; ip->index = SI;
  992. break;
  993. case 3:
  994. ip->base = BP; ip->index = DI;
  995. break;
  996. case 4:
  997. ip->base = SI;
  998. break;
  999. case 5:
  1000. ip->base = DI;
  1001. break;
  1002. case 6:
  1003. ip->base = BP;
  1004. break;
  1005. case 7:
  1006. ip->base = BX;
  1007. break;
  1008. default:
  1009. break;
  1010. }
  1011. return getdisp(map, ip, mod, rm, 6);
  1012. }
  1013. if (rm == 4) { /* scummy sib byte */
  1014. if (igetc(map, ip, &c) < 0)
  1015. return -1;
  1016. ip->ss = (c>>6)&0x03;
  1017. ip->index = (c>>3)&0x07;
  1018. if (ip->index == 4)
  1019. ip->index = -1;
  1020. ip->base = c&0x07;
  1021. return getdisp(map, ip, mod, ip->base, 5);
  1022. }
  1023. return getdisp(map, ip, mod, rm, 5);
  1024. }
  1025. static Optable *
  1026. mkinstr(Map *map, Instr *ip, ulong pc)
  1027. {
  1028. int i, n;
  1029. uchar c;
  1030. ushort s;
  1031. Optable *op, *obase;
  1032. char buf[128];
  1033. memset(ip, 0, sizeof(*ip));
  1034. ip->base = -1;
  1035. ip->index = -1;
  1036. if(asstype == AI8086)
  1037. ip->osize = 'W';
  1038. else {
  1039. ip->osize = 'L';
  1040. ip->asize = 'E';
  1041. }
  1042. ip->addr = pc;
  1043. if (igetc(map, ip, &c) < 0)
  1044. return 0;
  1045. obase = optable;
  1046. newop:
  1047. op = &obase[c];
  1048. if (op->proto == 0) {
  1049. badop:
  1050. n = snprint(buf, sizeof(buf), "opcode: ??");
  1051. for (i = 0; i < ip->n && n < sizeof(buf)-3; i++, n+=2)
  1052. _hexify(buf+n, ip->mem[i], 1);
  1053. strcpy(buf+n, "??");
  1054. werrstr(buf);
  1055. return 0;
  1056. }
  1057. for(i = 0; i < 2 && op->operand[i]; i++) {
  1058. switch(op->operand[i])
  1059. {
  1060. case Ib: /* 8-bit immediate - (no sign extension)*/
  1061. if (igetc(map, ip, &c) < 0)
  1062. return 0;
  1063. ip->imm = c&0xff;
  1064. break;
  1065. case Jbs: /* 8-bit jump immediate (sign extended) */
  1066. if (igetc(map, ip, &c) < 0)
  1067. return 0;
  1068. if (c&0x80)
  1069. ip->imm = c|0xffffff00;
  1070. else
  1071. ip->imm = c&0xff;
  1072. ip->jumptype = Jbs;
  1073. break;
  1074. case Ibs: /* 8-bit immediate (sign extended) */
  1075. if (igetc(map, ip, &c) < 0)
  1076. return 0;
  1077. if (c&0x80)
  1078. if (ip->osize == 'L')
  1079. ip->imm = c|0xffffff00;
  1080. else
  1081. ip->imm = c|0xff00;
  1082. else
  1083. ip->imm = c&0xff;
  1084. break;
  1085. case Iw: /* 16-bit immediate -> imm */
  1086. if (igets(map, ip, &s) < 0)
  1087. return 0;
  1088. ip->imm = s&0xffff;
  1089. ip->jumptype = Iw;
  1090. break;
  1091. case Iw2: /* 16-bit immediate -> in imm2*/
  1092. if (igets(map, ip, &s) < 0)
  1093. return 0;
  1094. ip->imm2 = s&0xffff;
  1095. break;
  1096. case Iwd: /* Operand-sized immediate (no sign extension)*/
  1097. if (ip->osize == 'L') {
  1098. if (igetl(map, ip, &ip->imm) < 0)
  1099. return 0;
  1100. } else {
  1101. if (igets(map, ip, &s)< 0)
  1102. return 0;
  1103. ip->imm = s&0xffff;
  1104. }
  1105. break;
  1106. case Awd: /* Address-sized immediate (no sign extension)*/
  1107. if (ip->asize == 'E') {
  1108. if (igetl(map, ip, &ip->imm) < 0)
  1109. return 0;
  1110. } else {
  1111. if (igets(map, ip, &s)< 0)
  1112. return 0;
  1113. ip->imm = s&0xffff;
  1114. }
  1115. break;
  1116. case Iwds: /* Operand-sized immediate (sign extended) */
  1117. if (ip->osize == 'L') {
  1118. if (igetl(map, ip, &ip->imm) < 0)
  1119. return 0;
  1120. } else {
  1121. if (igets(map, ip, &s)< 0)
  1122. return 0;
  1123. if (s&0x8000)
  1124. ip->imm = s|0xffff0000;
  1125. else
  1126. ip->imm = s&0xffff;
  1127. }
  1128. ip->jumptype = Iwds;
  1129. break;
  1130. case OA: /* literal 0x0a byte */
  1131. if (igetc(map, ip, &c) < 0)
  1132. return 0;
  1133. if (c != 0x0a)
  1134. goto badop;
  1135. break;
  1136. case R0: /* base register must be R0 */
  1137. if (ip->base != 0)
  1138. goto badop;
  1139. break;
  1140. case R1: /* base register must be R1 */
  1141. if (ip->base != 1)
  1142. goto badop;
  1143. break;
  1144. case RMB: /* R/M field with byte register (/r)*/
  1145. if (igetc(map, ip, &c) < 0)
  1146. return 0;
  1147. if (modrm(map, ip, c) < 0)
  1148. return 0;
  1149. ip->osize = 'B';
  1150. break;
  1151. case RM: /* R/M field with register (/r) */
  1152. if (igetc(map, ip, &c) < 0)
  1153. return 0;
  1154. if (modrm(map, ip, c) < 0)
  1155. return 0;
  1156. break;
  1157. case RMOPB: /* R/M field with op code (/digit) */
  1158. if (igetc(map, ip, &c) < 0)
  1159. return 0;
  1160. if (modrm(map, ip, c) < 0)
  1161. return 0;
  1162. c = ip->reg; /* secondary op code */
  1163. obase = (Optable*)op->proto;
  1164. ip->osize = 'B';
  1165. goto newop;
  1166. case RMOP: /* R/M field with op code (/digit) */
  1167. if (igetc(map, ip, &c) < 0)
  1168. return 0;
  1169. if (modrm(map, ip, c) < 0)
  1170. return 0;
  1171. c = ip->reg;
  1172. obase = (Optable*)op->proto;
  1173. goto newop;
  1174. case FRMOP: /* FP R/M field with op code (/digit) */
  1175. if (igetc(map, ip, &c) < 0)
  1176. return 0;
  1177. if (modrm(map, ip, c) < 0)
  1178. return 0;
  1179. if ((c&0xc0) == 0xc0)
  1180. c = ip->reg+8; /* 16 entry table */
  1181. else
  1182. c = ip->reg;
  1183. obase = (Optable*)op->proto;
  1184. goto newop;
  1185. case FRMEX: /* Extended FP R/M field with op code (/digit) */
  1186. if (igetc(map, ip, &c) < 0)
  1187. return 0;
  1188. if (modrm(map, ip, c) < 0)
  1189. return 0;
  1190. if ((c&0xc0) == 0xc0)
  1191. c = (c&0x3f)+8; /* 64-entry table */
  1192. else
  1193. c = ip->reg;
  1194. obase = (Optable*)op->proto;
  1195. goto newop;
  1196. case RMR: /* R/M register only (mod = 11) */
  1197. if (igetc(map, ip, &c) < 0)
  1198. return 0;
  1199. if ((c&0xc0) != 0xc0) {
  1200. werrstr("invalid R/M register: %x", c);
  1201. return 0;
  1202. }
  1203. if (modrm(map, ip, c) < 0)
  1204. return 0;
  1205. break;
  1206. case RMM: /* R/M register only (mod = 11) */
  1207. if (igetc(map, ip, &c) < 0)
  1208. return 0;
  1209. if ((c&0xc0) == 0xc0) {
  1210. werrstr("invalid R/M memory mode: %x", c);
  1211. return 0;
  1212. }
  1213. if (modrm(map, ip, c) < 0)
  1214. return 0;
  1215. break;
  1216. case PTR: /* Seg:Displacement addr (ptr16:16 or ptr16:32) */
  1217. if (ip->osize == 'L') {
  1218. if (igetl(map, ip, &ip->disp) < 0)
  1219. return 0;
  1220. } else {
  1221. if (igets(map, ip, &s)< 0)
  1222. return 0;
  1223. ip->disp = s&0xffff;
  1224. }
  1225. if (igets(map, ip, (ushort*)&ip->seg) < 0)
  1226. return 0;
  1227. ip->jumptype = PTR;
  1228. break;
  1229. case AUX: /* Multi-byte op code - Auxiliary table */
  1230. obase = (Optable*)op->proto;
  1231. if (igetc(map, ip, &c) < 0)
  1232. return 0;
  1233. goto newop;
  1234. case PRE: /* Instr Prefix */
  1235. ip->prefix = (char*)op->proto;
  1236. if (igetc(map, ip, &c) < 0)
  1237. return 0;
  1238. goto newop;
  1239. case SEG: /* Segment Prefix */
  1240. ip->segment = (char*)op->proto;
  1241. if (igetc(map, ip, &c) < 0)
  1242. return 0;
  1243. goto newop;
  1244. case OPOVER: /* Operand size override */
  1245. ip->osize = 'W';
  1246. if (igetc(map, ip, &c) < 0)
  1247. return 0;
  1248. goto newop;
  1249. case ADDOVER: /* Address size override */
  1250. ip->asize = 0;
  1251. if (igetc(map, ip, &c) < 0)
  1252. return 0;
  1253. goto newop;
  1254. case JUMP: /* mark instruction as JUMP or RET */
  1255. case RET:
  1256. ip->jumptype = op->operand[i];
  1257. break;
  1258. default:
  1259. werrstr("bad operand type %d", op->operand[i]);
  1260. return 0;
  1261. }
  1262. }
  1263. return op;
  1264. }
  1265. static void
  1266. bprint(Instr *ip, char *fmt, ...)
  1267. {
  1268. va_list arg;
  1269. va_start(arg, fmt);
  1270. ip->curr = vseprint(ip->curr, ip->end, fmt, arg);
  1271. va_end(arg);
  1272. }
  1273. /*
  1274. * if we want to call 16 bit regs AX,BX,CX,...
  1275. * and 32 bit regs EAX,EBX,ECX,... then
  1276. * change the defs of ANAME and ONAME to:
  1277. * #define ANAME(ip) ((ip->asize == 'E' ? "E" : "")
  1278. * #define ONAME(ip) ((ip)->osize == 'L' ? "E" : "")
  1279. */
  1280. #define ANAME(ip) ""
  1281. #define ONAME(ip) ""
  1282. static char *reg[] = {
  1283. [AX] "AX",
  1284. [CX] "CX",
  1285. [DX] "DX",
  1286. [BX] "BX",
  1287. [SP] "SP",
  1288. [BP] "BP",
  1289. [SI] "SI",
  1290. [DI] "DI",
  1291. };
  1292. static char *breg[] = { "AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH" };
  1293. static char *sreg[] = { "ES", "CS", "SS", "DS", "FS", "GS" };
  1294. static void
  1295. plocal(Instr *ip)
  1296. {
  1297. int ret, offset;
  1298. Symbol s;
  1299. char *reg;
  1300. offset = ip->disp;
  1301. if (!findsym(ip->addr, CTEXT, &s) || !findlocal(&s, FRAMENAME, &s)) {
  1302. bprint(ip, "%lux(SP)", offset);
  1303. return;
  1304. }
  1305. if (s.value > ip->disp) {
  1306. ret = getauto(&s, s.value-ip->disp-mach->szaddr, CAUTO, &s);
  1307. reg = "(SP)";
  1308. } else {
  1309. offset -= s.value;
  1310. ret = getauto(&s, offset, CPARAM, &s);
  1311. reg = "(FP)";
  1312. }
  1313. if (ret)
  1314. bprint(ip, "%s+", s.name);
  1315. else
  1316. offset = ip->disp;
  1317. bprint(ip, "%lux%s", offset, reg);
  1318. }
  1319. static void
  1320. pea(Instr *ip)
  1321. {
  1322. if (ip->mod == 3) {
  1323. if (ip->osize == 'B')
  1324. bprint(ip, breg[ip->base]);
  1325. else
  1326. bprint(ip, "%s%s", ANAME(ip), reg[ip->base]);
  1327. return;
  1328. }
  1329. if (ip->segment)
  1330. bprint(ip, ip->segment);
  1331. if (ip->asize == 'E' && ip->base == SP)
  1332. plocal(ip);
  1333. else {
  1334. bprint(ip,"%lux", ip->disp);
  1335. if (ip->base >= 0)
  1336. bprint(ip,"(%s%s)", ANAME(ip), reg[ip->base]);
  1337. }
  1338. if (ip->index >= 0)
  1339. bprint(ip,"(%s%s*%d)", ANAME(ip), reg[ip->index], 1<<ip->ss);
  1340. }
  1341. static void
  1342. immediate(Instr *ip, long val)
  1343. {
  1344. Symbol s;
  1345. long w;
  1346. if (findsym(val, CANY, &s)) {
  1347. w = val - s.value;
  1348. if (w < 0)
  1349. w = -w;
  1350. if (w < 4096) {
  1351. if (w)
  1352. bprint(ip, "%s+%lux(SB)", s.name, w);
  1353. else
  1354. bprint(ip, "%s(SB)", s.name);
  1355. return;
  1356. }
  1357. }
  1358. bprint(ip, "%lux", val);
  1359. }
  1360. static void
  1361. prinstr(Instr *ip, char *fmt)
  1362. {
  1363. if (ip->prefix)
  1364. bprint(ip, "%s ", ip->prefix);
  1365. for (; *fmt && ip->curr < ip->end; fmt++) {
  1366. if (*fmt != '%')
  1367. *ip->curr++ = *fmt;
  1368. else switch(*++fmt)
  1369. {
  1370. case '%':
  1371. *ip->curr++ = '%';
  1372. break;
  1373. case 'A':
  1374. bprint(ip, "%s", ANAME(ip));
  1375. break;
  1376. case 'C':
  1377. bprint(ip, "CR%d", ip->reg);
  1378. break;
  1379. case 'D':
  1380. if (ip->reg < 4 || ip->reg == 6 || ip->reg == 7)
  1381. bprint(ip, "DR%d",ip->reg);
  1382. else
  1383. bprint(ip, "???");
  1384. break;
  1385. case 'I':
  1386. bprint(ip, "$");
  1387. immediate(ip, ip->imm2);
  1388. break;
  1389. case 'O':
  1390. bprint(ip,"%s", ONAME(ip));
  1391. break;
  1392. case 'i':
  1393. bprint(ip, "$");
  1394. immediate(ip,ip->imm);
  1395. break;
  1396. case 'R':
  1397. bprint(ip, "%s%s", ONAME(ip), reg[ip->reg]);
  1398. break;
  1399. case 'S':
  1400. bprint(ip, "%c", ip->osize);
  1401. break;
  1402. case 'T':
  1403. if (ip->reg == 6 || ip->reg == 7)
  1404. bprint(ip, "TR%d",ip->reg);
  1405. else
  1406. bprint(ip, "???");
  1407. break;
  1408. case 'X':
  1409. if (ip->osize == 'L')
  1410. bprint(ip,"CWDE");
  1411. else
  1412. bprint(ip, "CBW");
  1413. break;
  1414. case 'd':
  1415. bprint(ip,"%lux:%lux",ip->seg,ip->disp);
  1416. break;
  1417. case 'e':
  1418. pea(ip);
  1419. break;
  1420. case 'f':
  1421. bprint(ip, "F%d", ip->base);
  1422. break;
  1423. case 'g':
  1424. if (ip->reg < 6)
  1425. bprint(ip,"%s",sreg[ip->reg]);
  1426. else
  1427. bprint(ip,"???");
  1428. break;
  1429. case 'p':
  1430. immediate(ip, ip->imm+ip->addr+ip->n);
  1431. break;
  1432. case 'r':
  1433. if (ip->osize == 'B')
  1434. bprint(ip,"%s",breg[ip->reg]);
  1435. else
  1436. bprint(ip, reg[ip->reg]);
  1437. break;
  1438. case 'x':
  1439. if (ip->osize == 'L')
  1440. bprint(ip,"CDQ");
  1441. else
  1442. bprint(ip, "CWD");
  1443. break;
  1444. default:
  1445. bprint(ip, "%%%c", *fmt);
  1446. break;
  1447. }
  1448. }
  1449. *ip->curr = 0; /* there's always room for 1 byte */
  1450. }
  1451. static int
  1452. i386inst(Map *map, ulong pc, char modifier, char *buf, int n)
  1453. {
  1454. Instr instr;
  1455. Optable *op;
  1456. USED(modifier);
  1457. op = mkinstr(map, &instr, pc);
  1458. if (op == 0) {
  1459. errstr(buf, n);
  1460. return -1;
  1461. }
  1462. instr.curr = buf;
  1463. instr.end = buf+n-1;
  1464. prinstr(&instr, op->proto);
  1465. return instr.n;
  1466. }
  1467. static int
  1468. i386das(Map *map, ulong pc, char *buf, int n)
  1469. {
  1470. Instr instr;
  1471. int i;
  1472. if (mkinstr(map, &instr, pc) == 0) {
  1473. errstr(buf, n);
  1474. return -1;
  1475. }
  1476. for(i = 0; i < instr.n && n > 2; i++) {
  1477. _hexify(buf, instr.mem[i], 1);
  1478. buf += 2;
  1479. n -= 2;
  1480. }
  1481. *buf = 0;
  1482. return instr.n;
  1483. }
  1484. static int
  1485. i386instlen(Map *map, ulong pc)
  1486. {
  1487. Instr i;
  1488. if (mkinstr(map, &i, pc))
  1489. return i.n;
  1490. return -1;
  1491. }
  1492. static int
  1493. i386foll(Map *map, ulong pc, Rgetter rget, ulong *foll)
  1494. {
  1495. Instr i;
  1496. Optable *op;
  1497. ushort s;
  1498. ulong l, addr;
  1499. int n;
  1500. op = mkinstr(map, &i, pc);
  1501. if (!op)
  1502. return -1;
  1503. n = 0;
  1504. switch(i.jumptype) {
  1505. case RET: /* RETURN or LEAVE */
  1506. case Iw: /* RETURN */
  1507. if (strcmp(op->proto, "LEAVE") == 0) {
  1508. if (get4(map, (*rget)(map, "BP"), (long*)&l) < 0)
  1509. return -1;
  1510. } else if (get4(map, (*rget)(map, mach->sp), (long*)&l) < 0)
  1511. return -1;
  1512. foll[0] = l;
  1513. return 1;
  1514. case Iwds: /* pc relative JUMP or CALL*/
  1515. case Jbs: /* pc relative JUMP or CALL */
  1516. foll[0] = pc+i.imm+i.n;
  1517. n = 1;
  1518. break;
  1519. case PTR: /* seg:displacement JUMP or CALL */
  1520. foll[0] = (i.seg<<4)+i.disp;
  1521. return 1;
  1522. case JUMP: /* JUMP or CALL EA */
  1523. if(i.mod == 3) {
  1524. foll[0] = (*rget)(map, reg[i.base]);
  1525. return 1;
  1526. }
  1527. /* calculate the effective address */
  1528. addr = i.disp;
  1529. if (i.base >= 0) {
  1530. if (get4(map, (*rget)(map, reg[i.base]), (long*)&l) < 0)
  1531. return -1;
  1532. addr += l;
  1533. }
  1534. if (i.index >= 0) {
  1535. if (get4(map, (*rget)(map, reg[i.index]), (long*)&l) < 0)
  1536. return -1;
  1537. addr += l*(1<<i.ss);
  1538. }
  1539. /* now retrieve a seg:disp value at that address */
  1540. if (get2(map, addr, &s) < 0) /* seg */
  1541. return -1;
  1542. foll[0] = s<<4;
  1543. addr += 2;
  1544. if (i.asize == 'L') {
  1545. if (get4(map, addr, (long*)&l) < 0) /* disp32 */
  1546. return -1;
  1547. foll[0] += l;
  1548. } else { /* disp16 */
  1549. if (get2(map, addr, &s) < 0)
  1550. return -1;
  1551. foll[0] += s;
  1552. }
  1553. return 1;
  1554. default:
  1555. break;
  1556. }
  1557. if (strncmp(op->proto,"JMP", 3) == 0 || strncmp(op->proto,"CALL", 4) == 0)
  1558. return 1;
  1559. foll[n++] = pc+i.n;
  1560. return n;
  1561. }