mpvecdigmulsub.s 982 B

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253
  1. /*
  2. * mpvecdigmulsub(mpdigit *b, int n, mpdigit m, mpdigit *p)
  3. *
  4. * p -= b*m
  5. *
  6. * each step look like:
  7. * hi,lo = m*b[i]
  8. * lo += oldhi + carry
  9. * hi += carry
  10. * p[i] += lo
  11. * oldhi = hi
  12. *
  13. * the registers are:
  14. * hi = DX - constrained by hardware
  15. * lo = AX - constrained by hardware
  16. * b = SI - can't be BP
  17. * p = DI - can't be BP
  18. * i = BP
  19. * n = CX - constrained by LOOP instr
  20. * m = BX
  21. * oldhi = EX
  22. *
  23. */
  24. TEXT mpvecdigmulsub(SB),$4
  25. MOVL b+0(FP),SI
  26. MOVL n+4(FP),CX
  27. MOVL m+8(FP),BX
  28. MOVL p+12(FP),DI
  29. XORL BP,BP
  30. MOVL BP,0(SP)
  31. _mulsubloop:
  32. MOVL (SI)(BP*4),AX /* lo = b[i] */
  33. MULL BX /* hi, lo = b[i] * m */
  34. ADDL 0(SP),AX /* lo += oldhi */
  35. JCC _mulsubnocarry1
  36. INCL DX /* hi += carry */
  37. _mulsubnocarry1:
  38. SUBL AX,(DI)(BP*4)
  39. JCC _mulsubnocarry2
  40. INCL DX /* hi += carry */
  41. _mulsubnocarry2:
  42. MOVL DX,0(SP)
  43. INCL BP
  44. LOOP _mulsubloop
  45. MOVL 0(SP),AX
  46. SUBL AX,(DI)(BP*4)
  47. JCC _mulsubnocarry3
  48. MOVL $-1,AX
  49. RET
  50. _mulsubnocarry3:
  51. MOVL $1,AX
  52. RET