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cacheops.h 2.1 KB

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  1. /*
  2. * Cache operations for the cache instruction.
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * (C) Copyright 1996, 97, 99, 2002, 03 Ralf Baechle
  9. * (C) Copyright 1999 Silicon Graphics, Inc.
  10. */
  11. #ifndef __ASM_CACHEOPS_H
  12. #define __ASM_CACHEOPS_H
  13. /*
  14. * Cache Operations available on all MIPS processors with R4000-style caches
  15. */
  16. #define Index_Invalidate_I 0x00
  17. #define Index_Writeback_Inv_D 0x01
  18. #define Index_Load_Tag_I 0x04
  19. #define Index_Load_Tag_D 0x05
  20. #define Index_Store_Tag_I 0x08
  21. #define Index_Store_Tag_D 0x09
  22. #if defined(CONFIG_CPU_LOONGSON2)
  23. #define Hit_Invalidate_I 0x00
  24. #else
  25. #define Hit_Invalidate_I 0x10
  26. #endif
  27. #define Hit_Invalidate_D 0x11
  28. #define Hit_Writeback_Inv_D 0x15
  29. /*
  30. * R4000-specific cacheops
  31. */
  32. #define Create_Dirty_Excl_D 0x0d
  33. #define Fill 0x14
  34. #define Hit_Writeback_I 0x18
  35. #define Hit_Writeback_D 0x19
  36. /*
  37. * R4000SC and R4400SC-specific cacheops
  38. */
  39. #define Index_Invalidate_SI 0x02
  40. #define Index_Writeback_Inv_SD 0x03
  41. #define Index_Load_Tag_SI 0x06
  42. #define Index_Load_Tag_SD 0x07
  43. #define Index_Store_Tag_SI 0x0A
  44. #define Index_Store_Tag_SD 0x0B
  45. #define Create_Dirty_Excl_SD 0x0f
  46. #define Hit_Invalidate_SI 0x12
  47. #define Hit_Invalidate_SD 0x13
  48. #define Hit_Writeback_Inv_SD 0x17
  49. #define Hit_Writeback_SD 0x1b
  50. #define Hit_Set_Virtual_SI 0x1e
  51. #define Hit_Set_Virtual_SD 0x1f
  52. /*
  53. * R5000-specific cacheops
  54. */
  55. #define R5K_Page_Invalidate_S 0x17
  56. /*
  57. * RM7000-specific cacheops
  58. */
  59. #define Page_Invalidate_T 0x16
  60. /*
  61. * R10000-specific cacheops
  62. *
  63. * Cacheops 0x02, 0x06, 0x0a, 0x0c-0x0e, 0x16, 0x1a and 0x1e are unused.
  64. * Most of the _S cacheops are identical to the R4000SC _SD cacheops.
  65. */
  66. #define Index_Writeback_Inv_S 0x03
  67. #define Index_Load_Tag_S 0x07
  68. #define Index_Store_Tag_S 0x0B
  69. #define Hit_Invalidate_S 0x13
  70. #define Cache_Barrier 0x14
  71. #define Hit_Writeback_Inv_S 0x17
  72. #define Index_Load_Data_I 0x18
  73. #define Index_Load_Data_D 0x19
  74. #define Index_Load_Data_S 0x1b
  75. #define Index_Store_Data_I 0x1c
  76. #define Index_Store_Data_D 0x1d
  77. #define Index_Store_Data_S 0x1f
  78. #endif /* __ASM_CACHEOPS_H */