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- --- a/arch/mips/ath79/irq.c
- +++ b/arch/mips/ath79/irq.c
- @@ -27,6 +27,9 @@
- #include "machtypes.h"
-
-
- +static struct irq_chip ip2_chip;
- +static struct irq_chip ip3_chip;
- +
- static void ar934x_ip2_irq_dispatch(struct irq_desc *desc)
- {
- u32 status;
- @@ -56,8 +59,7 @@ static void ar934x_ip2_irq_init(void)
-
- for (i = ATH79_IP2_IRQ_BASE;
- i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
- - irq_set_chip_and_handler(i, &dummy_irq_chip,
- - handle_level_irq);
- + irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq);
-
- irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch);
- }
- @@ -85,7 +87,7 @@ static void qca953x_irq_init(void)
-
- for (i = ATH79_IP2_IRQ_BASE;
- i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
- - irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq);
- + irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq);
-
- irq_set_chained_handler(ATH79_CPU_IRQ(2), qca953x_ip2_irq_dispatch);
- }
- @@ -149,15 +151,13 @@ static void qca955x_irq_init(void)
-
- for (i = ATH79_IP2_IRQ_BASE;
- i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
- - irq_set_chip_and_handler(i, &dummy_irq_chip,
- - handle_level_irq);
- + irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq);
-
- irq_set_chained_handler(ATH79_CPU_IRQ(2), qca955x_ip2_irq_dispatch);
-
- for (i = ATH79_IP3_IRQ_BASE;
- i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++)
- - irq_set_chip_and_handler(i, &dummy_irq_chip,
- - handle_level_irq);
- + irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq);
-
- irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch);
- }
- @@ -228,13 +228,13 @@ static void qca956x_irq_init(void)
-
- for (i = ATH79_IP2_IRQ_BASE;
- i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
- - irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq);
- + irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq);
-
- irq_set_chained_handler(ATH79_CPU_IRQ(2), qca956x_ip2_irq_dispatch);
-
- for (i = ATH79_IP3_IRQ_BASE;
- i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++)
- - irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq);
- + irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq);
-
- irq_set_chained_handler(ATH79_CPU_IRQ(3), qca956x_ip3_irq_dispatch);
-
- @@ -243,12 +243,40 @@ static void qca956x_irq_init(void)
- late_time_init = &qca956x_enable_timer_cb;
- }
-
- +static void ath79_ip2_disable(struct irq_data *data)
- +{
- + disable_irq(ATH79_CPU_IRQ(2));
- +}
- +
- +static void ath79_ip2_enable(struct irq_data *data)
- +{
- + enable_irq(ATH79_CPU_IRQ(2));
- +}
- +
- +static void ath79_ip3_disable(struct irq_data *data)
- +{
- + disable_irq(ATH79_CPU_IRQ(3));
- +}
- +
- +static void ath79_ip3_enable(struct irq_data *data)
- +{
- + enable_irq(ATH79_CPU_IRQ(3));
- +}
- +
- void __init arch_init_irq(void)
- {
- unsigned irq_wb_chan2 = -1;
- unsigned irq_wb_chan3 = -1;
- bool misc_is_ar71xx;
-
- + ip2_chip = dummy_irq_chip;
- + ip2_chip.irq_disable = ath79_ip2_disable;
- + ip2_chip.irq_enable = ath79_ip2_enable;
- +
- + ip3_chip = dummy_irq_chip;
- + ip3_chip.irq_disable = ath79_ip3_disable;
- + ip3_chip.irq_enable = ath79_ip3_enable;
- +
- if (mips_machtype == ATH79_MACH_GENERIC_OF) {
- irqchip_init();
- return;
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