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@@ -1,4 +1,4 @@
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-/*
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+/*
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cardbus and pcmcia (grmph) support.
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*/
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#include "u.h"
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@@ -11,6 +11,8 @@
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#define DEBUG 0
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+#pragma varargck type "T" int
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+
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#define MAP(x,o) (Rmap + (x)*0x8 + o)
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enum {
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@@ -39,7 +41,7 @@ enum {
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TI1131xSC = 0x80, // system control
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TI122X_SC_INTRTIE = 1 << 29,
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- TI12xxIM = 0x8c, //
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+ TI12xxIM = 0x8c, //
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TI1131xCC = 0x91, // card control
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TI113X_CC_RIENB = 1 << 7,
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TI113X_CC_ZVENABLE = 1 << 6,
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@@ -130,8 +132,8 @@ enum
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Fcardena= (1<<4), /* PC card enable */
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Rigc= 0x3, /* interrupt and general control */
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Fiocard= (1<<5), /* I/O card (vs memory) */
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- Fnotreset= (1<<6), /* reset if not set */
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- FSMIena= (1<<4), /* enable change interrupt on SMI */
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+ Fnotreset= (1<<6), /* reset if not set */
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+ FSMIena= (1<<4), /* enable change interrupt on SMI */
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Rcsc= 0x4, /* card status change */
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Rcscic= 0x5, /* card status change interrupt config */
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Fchangeena= (1<<3), /* card changed */
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@@ -252,16 +254,16 @@ enum {
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static Cardbus cbslots[Nslots];
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static int nslots;
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-static ulong exponent[8] = {
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- 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000,
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+static ulong exponent[8] = {
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+ 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000,
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};
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static ulong vmant[16] = {
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10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80, 90,
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};
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-static ulong mantissa[16] = {
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- 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80,
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+static ulong mantissa[16] = {
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+ 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80,
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};
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static char Enocard[] = "No card in slot";
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@@ -278,13 +280,8 @@ static Cmdtab pccardctlmsg[] =
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CMpower, "power", 1,
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};
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-static void cbint(Ureg *, void *);
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static int powerup(Cardbus *);
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static void configure(Cardbus *);
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-static void managecard(Cardbus *);
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-static void cardmanager(void *);
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-static void eject(Cardbus *);
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-static void interrupt(Ureg *, void *);
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static void powerdown(Cardbus *cb);
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static void unconfigure(Cardbus *cb);
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@@ -491,7 +488,7 @@ cbinterrupt(Ureg *, void *)
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rdreg(cb, Rcsc); /* Ack the interrupt */
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if(DEBUG)
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- print("#Y%ld: interrupt: event %.8lX, state %.8lX, (%s)\n",
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+ print("#Y%ld: interrupt: event %.8lX, state %.8lX, (%s)\n",
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cb - cbslots, event, state, states[cb->state]);
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if (event & SE_CCD) {
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@@ -523,7 +520,7 @@ devpccardlink(void)
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char *p;
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void *baddrva;
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- if (initialized)
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+ if (initialized)
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return;
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initialized = 1;
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@@ -560,7 +557,7 @@ devpccardlink(void)
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cb->pci = pci;
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cb->variant = &variant[i];
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-
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+
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if (pci->vid != TI_vid) {
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// Gross hack, needs a fix. Inherit the mappings from 9load
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// for the TIs (pb)
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@@ -584,7 +581,7 @@ devpccardlink(void)
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}
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// Patch up intl if needed.
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- if ((pin = pcicfgr8(pci, PciINTP)) != 0 &&
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+ if ((pin = pcicfgr8(pci, PciINTP)) != 0 &&
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(pci->intl == 0xff || pci->intl == 0)) {
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pci->intl = pciipin(nil, pin);
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pcicfgw8(pci, PciINTL, pci->intl);
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@@ -600,16 +597,16 @@ devpccardlink(void)
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cc = pcicfgr8(pci, TI1131xCC);
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cc &= ~(TI113X_CC_PCI_IRQ_ENA |
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- TI113X_CC_PCI_IREQ |
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+ TI113X_CC_PCI_IREQ |
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TI113X_CC_PCI_CSC |
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TI113X_CC_ZVENABLE);
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- cc |= TI113X_CC_PCI_IRQ_ENA |
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- TI113X_CC_PCI_IREQ |
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+ cc |= TI113X_CC_PCI_IRQ_ENA |
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+ TI113X_CC_PCI_IREQ |
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TI113X_CC_SPKROUTEN;
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pcicfgw8(pci, TI1131xCC, cc);
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// PCI interrupts only
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- pcicfgw8(pci, TI1131xDC,
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+ pcicfgw8(pci, TI1131xDC,
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pcicfgr8(pci, TI1131xDC) & ~6);
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// CSC ints to PCI bus.
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@@ -620,10 +617,10 @@ devpccardlink(void)
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}
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else if (pci->did == TI_1420_did) {
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// Disable Vcc protection
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- pcicfgw32(cb->pci, 0x80,
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+ pcicfgw32(cb->pci, 0x80,
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pcicfgr32(cb->pci, 0x80) | (1 << 21));
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}
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-
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+
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pcicfgw16(cb->pci, PciPMC, pcicfgr16(cb->pci, PciPMC) & ~3);
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}
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if (pci->vid == O2_vid) {
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@@ -652,7 +649,7 @@ devpccardlink(void)
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/* Don't really know what to do with this... */
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i82365probe(cb, LegacyAddr, LegacyAddr + 1);
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- print("#Y%ld: %s, %.8ulX intl %d\n", cb - cbslots,
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+ print("#Y%ld: %s, %.8ulX intl %d\n", cb - cbslots,
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variant[i].name, baddr, pci->intl);
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}
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@@ -681,7 +678,7 @@ devpccardlink(void)
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/* Ack and enable interrupts on all events */
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//cb->regs[SocketEvent] = cb->regs[SocketEvent];
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- cb->regs[SocketMask] |= 0xF;
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+ cb->regs[SocketMask] |= 0xF;
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wrreg(cb, Rcscic, 0xC);
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}
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}
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@@ -720,15 +717,15 @@ powerup(Cardbus *cb)
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}
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if ((state & SS_3V) == 0 && (state & SS_5V) == 0) {
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- print("#Y%ld: Unsupported voltage, powering down card!\n",
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+ print("#Y%ld: Unsupported voltage, powering down card!\n",
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cb - cbslots);
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cb->regs[SocketControl] = 0;
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return 0;
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}
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if(DEBUG)
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- print("#Y%ld: card %spowered at %d volt\n", cb - cbslots,
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- (state & SS_POWER)? "": "not ",
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+ print("#Y%ld: card %spowered at %d volt\n", cb - cbslots,
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+ (state & SS_POWER)? "": "not ",
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(state & SS_3V)? 3: (state & SS_5V)? 5: -1);
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/* Power up the card
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@@ -770,13 +767,13 @@ powerdown(Cardbus *cb)
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static void
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configure(Cardbus *cb)
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{
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- Pcidev *pci;
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+ int i, r;
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ulong size, bar;
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- int i, ioindex, memindex, r;
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+ Pcidev *pci;
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+ ulong membase, iobase, memlen, iolen, rombase, romlen;
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if(DEBUG)
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- print("configuring slot %ld (%s)\n",
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- cb - cbslots, states[cb->state]);
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+ print("configuring slot %ld (%s)\n", cb - cbslots, states[cb->state]);
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if (cb->state == SlotConfigured)
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return;
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engine(cb, CardConfigured);
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@@ -790,8 +787,45 @@ configure(Cardbus *cb)
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/* Scan the CardBus for new PCI devices */
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pciscan(pcicfgr8(cb->pci, PciSBN), &cb->pci->bridge);
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- pci = cb->pci->bridge;
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- while (pci) {
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+
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+ /*
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+ * size the devices on the bus, reserve a minimum for devices arriving later,
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+ * allow for ROM space, allocate space, and set the cardbus mapping registers
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+ */
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+ pcibussize(cb->pci->bridge, &memlen, &iolen); /* TO DO: need initial alignments */
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+
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+ romlen = 0;
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+ for(pci = cb->pci->bridge; pci != nil; pci = pci->list){
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+ size = pcibarsize(pci, PciEBAR0);
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+ if(size > 0){
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+ pci->rom.bar = -1;
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+ pci->rom.size = size;
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+ romlen += size;
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+ }
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+ }
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+
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+ if(iolen < 512)
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+ iolen = 512;
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+ iobase = ioreserve(~0, iolen, 0, "cardbus");
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+ pcicfgw32(cb->pci, PciCBIBR0, iobase);
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+ pcicfgw32(cb->pci, PciCBILR0, iobase + iolen-1);
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+ pcicfgw32(cb->pci, PciCBIBR1, 0);
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+ pcicfgw32(cb->pci, PciCBILR1, 0);
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+
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+ rombase = memlen;
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+ memlen += romlen;
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+ if(memlen < 1*1024*1024)
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+ memlen = 1*1024*1024;
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+ membase = upaalloc(memlen, 4*1024*1024); /* TO DO: better alignment */
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+ pcicfgw32(cb->pci, PciCBMBR0, membase);
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+ pcicfgw32(cb->pci, PciCBMLR0, membase + memlen-1);
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+ pcicfgw32(cb->pci, PciCBMBR1, 0);
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+ pcicfgw32(cb->pci, PciCBMLR1, 0);
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+
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+// pcibussize(cb->pci->bridge, &membase, &iobase); /* now assign them */
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+ rombase += membase;
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+
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+ for(pci = cb->pci->bridge; pci != nil; pci = pci->list){
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r = pcicfgr16(pci, PciPCR);
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r &= ~(PciPCR_IO|PciPCR_MEM);
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pcicfgw16(pci, PciPCR, r);
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@@ -802,74 +836,28 @@ configure(Cardbus *cb)
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* CardBus cards.
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* XXX, need to support multifunction cards
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*/
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- memindex = ioindex = 0;
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- for (i = 0; i != Nbars; i++) {
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-
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- if (pci->mem[i].size == 0)
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+ for(i = 0; i < Nbars; i++) {
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+ if(pci->mem[i].size == 0)
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continue;
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- if (pci->mem[i].bar & 1) {
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-
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- // Allocate I/O space
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- if (ioindex > 1) {
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- print("#Y%ld: WARNING: Can only configure 2 I/O slots\n", cb - cbslots);
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- continue;
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+ bar = pci->mem[i].bar;
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+ if(bar & 1)
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+ bar += iobase;
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+ else
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+ bar += membase;
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+ pci->mem[i].bar = bar;
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+ pcicfgw32(pci, PciBAR0 + 4*i, bar);
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+ if((bar & 1) == 0){
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+ print("%T mem[%d] %8.8lux %d\n", pci->tbdf, i, bar, pci->mem[i].size);
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+ if(bar & 0x80){ /* TO DO: enable prefetch */
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+ ;
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}
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- bar = ioreserve(-1, pci->mem[i].size, 0, "cardbus");
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-
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- pci->mem[i].bar = bar | 1;
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- pcicfgw32(pci, PciBAR0 + i * sizeof(ulong),
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- pci->mem[i].bar);
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- pcicfgw16(cb->pci, PciCBIBR0 + ioindex * 8, bar);
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- pcicfgw16(cb->pci, PciCBILR0 + ioindex * 8,
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- bar + pci->mem[i].size - 1);
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- if(DEBUG)
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- print("ioindex[%d] %.8luX (%d)\n",
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- ioindex, bar, pci->mem[i].size);
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- ioindex++;
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- continue;
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}
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-
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- // Allocating memory space
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- if (memindex > 1) {
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- print("#Y%ld: WARNING: Can only configure 2 memory slots\n", cb - cbslots);
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- continue;
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- }
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-
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- bar = upaalloc(pci->mem[i].size, BY2PG);
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- pci->mem[i].bar = bar | (pci->mem[i].bar & 0x80);
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- pcicfgw32(pci, PciBAR0 + i * sizeof(ulong), pci->mem[i].bar);
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- pcicfgw32(cb->pci, PciCBMBR0 + memindex * 8, bar);
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- pcicfgw32(cb->pci, PciCBMLR0 + memindex * 8,
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- bar + pci->mem[i].size - 1);
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-
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- if (pci->mem[i].bar & 0x80) {
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- /* Enable prefetch */
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- r = pcicfgr16(cb->pci, PciBCR);
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- r |= 1 << (8 + memindex);
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- pcicfgw16(cb->pci, PciBCR, r);
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- }
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-
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- if(DEBUG)
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- print("memindex[%d] %.8luX (%d)\n",
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- memindex, bar, pci->mem[i].size);
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- memindex++;
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}
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-
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- if ((size = pcibarsize(pci, PciEBAR0)) > 0) {
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-
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- if (memindex > 1)
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- print("#Y%ld: WARNING: Too many memory spaces, not mapping ROM space\n",
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- cb - cbslots);
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- else {
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- pci->rom.bar = upaalloc(size, BY2PG);
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- pci->rom.size = size;
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-
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- pcicfgw32(pci, PciEBAR0, pci->rom.bar);
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- pcicfgw32(cb->pci, PciCBMBR0 + memindex * 8,
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- pci->rom.bar);
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- pcicfgw32(cb->pci, PciCBMLR0 + memindex * 8,
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- pci->rom.bar + pci->rom.size - 1);
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- }
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+ if((size = pcibarsize(pci, PciEBAR0)) > 0) { /* TO DO: can this be done by pci.c? */
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+ pci->rom.bar = rombase;
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+ pci->rom.size = size;
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+ rombase += size;
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+ pcicfgw32(pci, PciEBAR0, pci->rom.bar);
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}
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/* Set the basic PCI registers for the device */
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@@ -886,11 +874,9 @@ configure(Cardbus *cb)
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pcicfgw8(pci, PciINTL, pci->intl);
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/* Route interrupts to INTA#/B# */
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- pcicfgw16(cb->pci, PciBCR,
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+ pcicfgw16(cb->pci, PciBCR,
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pcicfgr16(cb->pci, PciBCR) & ~(1 << 7));
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}
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-
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- pci = pci->list;
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}
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}
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@@ -909,9 +895,9 @@ unconfigure(Cardbus *cb)
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}
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pci = cb->pci->bridge;
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- if (pci == nil)
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+ if (pci == nil)
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return; /* Not configured */
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- cb->pci->bridge = nil;
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+ cb->pci->bridge = nil;
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memindex = ioindex = 0;
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while (pci) {
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@@ -922,7 +908,7 @@ unconfigure(Cardbus *cb)
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continue;
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if (pci->mem[i].bar & 1) {
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iofree(pci->mem[i].bar & ~1);
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- pcicfgw16(cb->pci, PciCBIBR0 + ioindex * 8,
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+ pcicfgw16(cb->pci, PciCBIBR0 + ioindex * 8,
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(ushort)-1);
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pcicfgw16(cb->pci, PciCBILR0 + ioindex * 8, 0);
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ioindex++;
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@@ -1020,9 +1006,9 @@ pccard_pcmspecial(char *idstr, ISAConf *isa)
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lock(cb);
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if (cb->state == SlotConfigured &&
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- cb->type == PC16 &&
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+ cb->type == PC16 &&
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!cb->special &&
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- strstr(cb->linfo.verstr, idstr))
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+ strstr(cb->linfo.verstr, idstr))
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break;
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unlock(cb);
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}
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@@ -1054,7 +1040,7 @@ pccard_pcmspecial(char *idstr, ISAConf *isa)
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index = strtol(&isa->opt[i][6], &cp, 0);
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if(cp == &isa->opt[i][6] || index >= pi->nctab) {
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unlock(cb);
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- print("#Y%d: Cannot find index %d in conf table\n",
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+ print("#Y%d: Cannot find index %d in conf table\n",
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(int)(cb - cbslots), index);
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return -1;
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}
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@@ -1069,7 +1055,7 @@ pccard_pcmspecial(char *idstr, ISAConf *isa)
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ct = pi->defctab;
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else
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ct = pi->ctab;
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-
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+
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/* try for best match */
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if(ct->nio == 0
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|| ct->io[0].start != isa->port || ((1<<irq) & ct->irqs) == 0){
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@@ -1185,61 +1171,6 @@ pccard_pcmspecialclose(int slotno)
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cb->special = 0;
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}
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-static int
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-xcistuple(int slotno, int tuple, int subtuple, void *v, int nv, int attr)
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-{
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- PCMmap *m;
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- Cisdat cis;
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- int i, l;
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- uchar *p;
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- uchar type, link, n, c;
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- int this, subtype;
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- Cardbus *cb = &cbslots[slotno];
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-
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- m = isamap(cb, 0, 0, attr);
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- if(m == 0)
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- return -1;
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-
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- cis.cisbase = KADDR(m->isa);
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- cis.cispos = 0;
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- cis.cisskip = attr ? 2 : 1;
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- cis.cislen = m->len;
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-
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- /* loop through all the tuples */
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- for(i = 0; i < 1000; i++){
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- this = cis.cispos;
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- if(readc(&cis, &type) != 1)
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- break;
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- if(type == 0xFF)
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- break;
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- if(readc(&cis, &link) != 1)
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- break;
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- if(link == 0xFF)
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- break;
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-
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- n = link;
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- if (link > 1 && subtuple != -1) {
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- if (readc(&cis, &c) != 1)
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- break;
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- subtype = c;
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- n--;
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- } else
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- subtype = -1;
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-
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- if(type == tuple && subtype == subtuple) {
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- p = v;
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- for(l=0; l<nv && l<n; l++)
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- if(readc(&cis, p++) != 1)
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- break;
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- isaunmap(m);
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- return nv;
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- }
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- cis.cispos = this + (2+link);
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- }
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- isaunmap(m);
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- return -1;
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-}
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-
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static Chan*
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pccardattach(char *spec)
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{
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@@ -1285,10 +1216,10 @@ pccardgen(Chan *c, char*, Dirtab *, int , int i, Dir *dp)
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snprint(up->genbuf, sizeof up->genbuf, "cb%dctl", slotno);
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}
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else {
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- /* Entries for memory regions. I'll implement them when
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+ /* Entries for memory regions. I'll implement them when
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needed. (pb) */
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}
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- qid.vers = 0;
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+ qid.vers = 0;
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qid.type = QTFILE;
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devdir(c, qid, up->genbuf, len, eve, 0660, dp);
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return 1;
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@@ -1359,7 +1290,7 @@ pccardread(Chan *c, void *a, long n, vlong offset)
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buf = p = malloc(READSTR);
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buf[0] = 0;
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e = p + READSTR;
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-
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+
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cb = &cbslots[SLOTNO(c)];
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lock(cb);
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p = seprint(p, e, "slot %ld: %s; ", cb - cbslots, states[cb->state]);
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@@ -1375,13 +1306,13 @@ pccardread(Chan *c, void *a, long n, vlong offset)
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int i;
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while (pci) {
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- p = seprint(p, e, "%.4uX %.4uX; irq %d\n",
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+ p = seprint(p, e, "%.4uX %.4uX; irq %d\n",
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pci->vid, pci->did, pci->intl);
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for (i = 0; i != Nbars; i++)
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if (pci->mem[i].size)
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- p = seprint(p, e,
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+ p = seprint(p, e,
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"\tmem[%d] %.8ulX (%.8uX)\n",
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- i, pci->mem[i].bar,
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+ i, pci->mem[i].bar,
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pci->mem[i].size);
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if (pci->rom.size)
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p = seprint(p, e, "\tROM %.8ulX (%.8uX)\n",
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@@ -1403,7 +1334,7 @@ pccardread(Chan *c, void *a, long n, vlong offset)
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int j;
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ct = &pi->ctab[i];
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- p = seprint(p, e,
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+ p = seprint(p, e,
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"\tconfiguration[%d] irqs %.4uX; vpp %d, %d; %s\n",
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i, ct->irqs, ct->vpp1, ct->vpp2,
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(ct == pi->defctab)? "(default);": "");
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@@ -1416,7 +1347,7 @@ pccardread(Chan *c, void *a, long n, vlong offset)
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break;
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}
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unlock(cb);
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-
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+
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n = readstr(offset, a, n, buf);
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free(buf);
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return n;
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@@ -1470,7 +1401,7 @@ Dev pccarddevtab = {
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"cardbus",
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devreset,
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- devinit,
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+ devinit,
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devshutdown,
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pccardattach,
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pccardwalk,
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